Handbook of Digital Techniques for High-Speed Design: Design Examples, Signaling and Memory Technologies, Fiber Optics, Modeling, and Simulation to Ensure
by: Tom Granberg
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This book was designed from the beginning to be used as both an engineering textbook in colleges and universities and as an in-depth reference for practicing engineers. Chapters in the book are grouped by topic or function. The chapters would likely be most enjoyable if they were not read in numerical sequence but according to the reader's interests and goals, or the goals of the classroom. Chapters 4 through 9 discuss high-speed signaling technologies in so much detail that reading them all sequentially would result in glazed eyes and cure the worst insomniac!
You can gain a good appreciation for the content by taking a few moments to scan the table of contents, which is titled simply "Contents." This will not only give you an understanding of the book's subject matter but also the wide range of topics related to high-speed digital design. For use as a reference, you can, of course, just flip to the topic of interest.
Most readers will find a quick reading of Chapters 1 through 3 worthwhile. These provide a quick introduction to trends in high-speed design, SerDes and bus technologies, and very basic background information on signal integrity. After reading the first three chapters, you can read chapters according to your interest or the goals of the university course.
Chapter 4 starts off the discussion of high-speed signaling technologies with GTL, GTLP, GTL+, and AGTL+. Chapter 5 introduces LVDS. Chapter 6 talks about the differences among BLVDS, LVDM, and M-LVDS. Chapter 7 details HSTL and SSTL. Chapter 8 categorizes and gives organization to the multitude of ECL devices out in the marketplace today. Chapter 9 discusses CML and explains how it differs from ECL.
Chapter 10 discusses high-speed features of today's Altera and Xilinx FPGAs such as 3.125 Gbps RocketIOs. It also discusses HardCopy devices, a shorter time-to-market and less expensive alternative to ASICs for some applications. Chapter 12 discusses high-speed interconnects and cabling. As we'll mention again below, Chapter 23 models and simulates 5-to-10 Gbps board-to-board interconnects.
Those interested in memory technologies should read Chapter 7 on HSTL and SSTL signaling technologies, which are used by memory devices, and then move on to Chapter 13, which provides an overview of memory technologies. After that, you can elect to read about the memory technologies that interest you the most in Chapters 14 through 18, which discuss the various memory technologies in detail.
Chapter 19 introduces the basic theory behind S-parameters and continues on into the more challenging realm of differential and mixed-mode S-parameters. N-port, mixed-mode S-parameters are discussed in the Appendix to Chapter 23. Given that all of today's high-speed serial links are differential in nature, differential and mixed-mode S-parameters have become very relevant topics and are frequently used today in the modeling of high-speed systems.
Chapter 20 discusses TDR and TDT, time-domain reflectometry and time-domain transmission. These techniques are also in frequent use today in both the simulation and testing of high-speed circuit boards.
Three-and-a-half chapters are dedicated to fiber optics due to its increasing importance in high-speed design. Chapter 11 is a broad introduction to fiber optics. Chapter 28 discusses electrical optical circuit boards and Chapter 24 discusses modeling and simulation of fiber-optic transceivers. The second half of Chapter 31 discusses the testing and measurement of optical systems in Section 31.6, which starts on page 880.
Two chapters introduce modeling and simulation and four other chapters provide major, detailed design examples. Chapter 21 introduces modeling with IBIS. Chapter 22 introduces tools from Mentor Graphics Corporation and talks about the flow of the design process. Chapter 23 discusses the advances in design, modeling, simulation, and validation of board-to-board 5-to-10 Gbps interconnects through an actual example. As mentioned before, Chapter 24 discusses modeling and simulation of fiber-optic transceivers, and Chapter 26 is an excellent design example which uses BLVDS SerDes devices. Chapter 27 is dedicated entirely to an example of designing 3.125 Gbaud high-speed serial links using Motorola's WarpLink serial devices. Chapter 25, while not presenting a detailed design example, does discuss every aspect of designing with LVDS.
Four chapters discuss LVDS and Bus LVDS. As stated before, Chapter 5 discusses the LVDS signaling standard and Chapter 6 discusses the BLVDS, LVDM, and M-LVDS signaling standards. Chapter 25 discusses how to design using LVDS and Chapter 26 is an excellent example of a detailed design using BLVDS SerDes devices.
Chapters 29 and 30 discuss the emerging protocols and technology behind RapidIO (Chapter 29) and PCI-Express (Chapter 30). These chapters provide an insight into what is being done to address the issues of faster and faster data rates in embedded systems, and ever-increasing bus speeds and system architecture complexity.
Finally, Chapter 31 is an informative discussion on the high-speed aspects of laboratory and test equipment, including such topics as equivalent-time oscilloscopes.
Throughout this textbook, there are numerous simulation examples and discussions of modeling. The reader is referred to the index for a detailed listing of "simulations" and "models."
This Textbook Was Written with Educational Institutions in Mind
This textbook was prepared from the beginning to be used not only by practicing engineers in the field working with high-speed digital electronics, but by instructors at universities and colleges who wish to teach high-speed digital design fundamentals to their students. High-speed digital design concepts and techniques can no longer be left for students to learn on the job after graduation. Today's clock rates in the hundreds of megahertz for typical applications and in the multigigahertz range for SerDes applications make this knowledge basic and fundamental to any electrical engineering degree.
Prior to this textbook, there has been no suitable textbook available from which to teach these required concepts. The handful of books written on this subject do not make good textbooks for a number of reasons. Two-thirds of these books have no exercises ? no homework problems ? and leave the extremely time-consuming task of developing these problems to the instructor who could better spend his or her time assisting students. Many of these books have no discussion of the various high-speed signaling technologies such as SSTL (Stub-Series-Terminated Logic), CML (Current-Mode Logic), or proprietary signaling technologies such as Motorola's controlled-impedance WarpLink technology. Today's CML is not a synonym for ECL as was the case two decades ago.
Many of these unsuitable-for-the-classroom books do not provide the basic background material on which high-speed design concepts are based. For example, many of them include no discussion of SerDes devices, double data rate (DDR) and quad data rate (QDR) devices, and no discussion of embedded clocks or echo clocks used by memory devices. They do not provide any discussion of the wide range of high-speed memory devices available today ? SigmaRAM, Fast Cycle RAM, Network DRAM, Reduced Latency DRAM, Zero Bus Turnaround SRAM, and so on ? at all. These books provide no background in TDR (time-domain reflectometry), which has changed considerably from years ago when it was used to find faults on power cables. The books that do mention it assume the reader is versatile in making TDR measurements. They provide no discussion of S-parameters, let alone the differential and mixed-mode S-parameters in use today, and leave it for the reader to hunt down microwave books or application notes for material on these subjects. Many books do not discuss how jitter is measured and how jitter masks are created and used.
Some of these books are too specialized and leave out the broad scope that this field invloves. Two signal integrity books I have seen are so mathematically rigorous that any course taught using them would be a math course and not an electrical engineering or design course. One is so mathematically rigorous that I believe it would intimidate the great majority of math professors as well, and is just not appropriate for an engineering or digital design course.
Of critical importance today are the EDA (Electronic Design Automation) tools that are used to generate high-speed digital designs. Most books make no mention of these, let alone discuss design constraints and how constraints are implemented and integrated into the design. Today, also, fiber optics is taking on increasing importance in high-speed designs and, as with the many other subjects mentioned above, most other high-speed design and signal integrity books do not touch on this subject.
Enough negativity ? these other books do make excellent references for the practicing engineer and allow the reader to research the topics presented in great detail.
University Courses for Which This Book Is Suitable
This book is suitable for use in a one- or two-semester course in high-speed digital design or in a one-semester course in the use of high-speed memory devices. Six of the 31 chapters are dedicated to memory devices. The material could be taught as either a junior-level or senior-level undergraduate course in that there is a minimum of math throughout the book. The material could also be taught at a more accelerated pace at the graduate level.
Solutions Manual Is Available
A 160-page (approximately) solutions manual is available to instructors teaching courses based upon this textbook. The manual includes answers to every exercise listed in the textbook with the exercises listed in the order of the chapters. Each exercise is restated in the...
Table of Contents Preface. I. INTRODUCTION. 1. Trends in High-Speed Design. 2. ASICs, Backplane Configurations, and SerDes Technology. 3. A Few Basics on Signal Integrity. II. SIGNALING TECHNOLOGIES AND DEVICES. 4. Gunning Transceiver Logic (GTL, GTLP, GTL+, AGTL+). 5. Low Voltage Differential Signaling (LVDS). 6. Bus LVDS (BLVDS), LVDS Multipoint (LVDM), and Multipoint LVDS (M-LVDS). 7. High-Speed Transceiver Logic (HSTL) and Stub-Series Terminated Logic (SSTL). 8. Emitter Coupled Logic (ECL, PECL, LVPECL, ECLinPS Lite and Plus, SiGe, ECL Pro, GigaPro and GigaComm). 9. Current-Mode Logic (CML). 10. FPGAs - 3.125 Gbps RocketIOs and HardCopy Devices. 11. Fiber-Optic Components. 12. High-Speed Interconnects and Cabling. III. HIGH-SPEED MEMORY AND MEMORY INTERFACES. 13. Memory Device Overview and Memory Signaling Technologies. 14. Double Data Rate SDRAM (DDR, DDR2) and SPICE Simulation. 15. GDDR3, ZBT, FCRAM, SigmaRAM, RLDRAM, DDR SRAM, Flash, FeRAM, and MRAM. 16. Quad Data Rate (QDR, QDRII) SRAM. 17. Direct Rambus DRAM (DRDRAM). 18. Xtreme Data Rate (XDR) DRAM, FlexPhase and ODR. IV. MODELING, SIMULATION, AND EDA TOOLS. 19. Differential and Mixed-Mode SParameters. 20. Time Domain Reflectometry (TDR), Time Domain Transmission (TDT), and VNAs. 21. Modeling with IBIS. 22. Mentor Graphics - EDA Tools for High-Speed Design, Simulation, Verification, and Layout. V. DESIGN CONCEPTS AND EXAMPLES. 23. Advances in Design, Modeling, Simulation, and Measurement Validation of High-Performance Board-to-Board 5-to-10 Gbps Interconnects. Appendix 23A. Generalized N-Port, Mixed-Mode S-Parameters. 24. IBIS Modeling and Simulation of High-Speed Fiber-Optic Transceivers. 25. Designing with LVDS. 26. Designing to 10 Gbps Using SerDes Transceivers, Serializers, and Deserializers. 27. WarpLink SerDes System Design Example. VI. EMERGING PROTOCOLS AND TECHNOLOGIES. 28. Electrical Optical Circuit Board (EOCB). 29. RapidIO. 30. PCI Express and ExpressCard. VII. LAB AND TEST INSTRUMENTATION. 31. Electrical and Optical Test Equipment. Acronyms. References. About the Author.
Practicing engineers whowork with high-speed digital designknow that a thorough, fully up-to-date resource is crucial for keeping pacewith rapidly changing technologies. Senior and graduate-level engineeringstudents need a similar resource, but with added introductory material andplenty of exercises. Only one book fills the need of both audiences?Handbookof Digital Techniques for High-Speed Design, by electronics expert TomGranberg.
This practical handbookcovers every aspect of board-level design, starting with the basics of designtrends, SerDes and bus technologies, and signal integrity. In-depth topics includememory technologies, fiber optics, modeling and simulation, design tools andthe design process, CML controlled-impedance drivers, differential andmixed-mode S-parameters, and the emerging protocols and technologies of RapidIOand PCI-Express. Tom Granberg also features major, detailed high-speed designexamples?including a BLVDS SerDes design and a design with highgigabit-per-second serial links using WarpLink devices.
This book
Provides detailed technical information on CML, SSTL, GTL/GTL+/GTLP, LVDS, Bus LVDS, M-LVDS, LVDM, ECL, PECL, LVPECL, HSTL, and more?plus applications best suited for each
Discusses IBIS and SPICE modeling and simulation, plus a full range of electronic design automation (EDA) tools
Emphasizes backplane and bus design with detailed guidelines and design rules
Covers fiber optics in detail?and when it makes sense to use them, and much more!
This book was written withtwo audiences in mind?practicing engineers who work with high-speeddigital electronics, and graduate and undergraduate-level students in collegesand universities who need to learn the concepts and techniques of high-speeddigital design before going to work in industry.
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