ESD testing: Glossary

Automotive Electronic Council (AEC)--A council that addresses electronic issues in the auto motive industry.

Air Ionizers--An electronic or nuclear device that generates ions from air to be used for dissipation of static charge typically used in manufacturing and assembly environments.

American National Standards Institute (ANSI)--The ANSI is a private nonprofit organization that oversees the development of voluntary consensus standards for products, services, processes, systems, and personnel in the United States.

Antistatic--Material or coating that prevents static buildup on work surfaces or materials. An antistatic agent is a compound used for treatment of materials or their surfaces in order to reduce or eliminate buildup of static electricity generally caused by the triboelectric effect.

Audits--Business processes review to verify conformance and compliance to ESD procedures and standards.

Cable Discharge Event (CDE)--An electrostatic discharge (ESD) event from a cable source.

Cassette Model (CM)--A test method whose source is a capacitor network with a 10 pF capacitor. This is also known as the Small Charge Model (SCM) and the "Nintendo model.

Charged Board Event (CBE) A test method for evaluation of the charging of a packaged semi conductor chip mounted on a board, followed by a grounding process. The semiconductor chip is mounted on a board during this test procedure. The board is placed on an insulator during this test.

Charged Device Model (CDM) A test method for evaluation of the charging of a packaged semiconductor chip, followed by a grounding a pin. The semiconductor chip is not socketed but placed on an insulator during the test.

Conductor--A material that allows free low of electrons. Example of conductors includes metal materials such as copper and aluminum. A material whose conductivity that exceeds insulators and semiconductors.

Current Reconstruction Method--A test method for evaluation of the current in a signal line reconstructed from the measured electromagnetic (EM) signal.

Device Under Test (DUT) --A component or device that is being tested in a test system.

Electromagnetic (EM) --A field or signal that contains both electric and magnetic fields.

Electromagnetic Compatibility (EMC) --A branch of electrical sciences which studies the unintentional generation, propagation, and reception of EM energy. EMC must address both the susceptibility of systems to EM interference and the propagation of EM noise.

Electromagnetic Interference (EMI) --An EM disturbance that affects an electrical circuit due to either EM induction or EM radiation emitted from an external source.

Electromagnetic Pulse (EMP) --A large EM burst event typically resulting from high energy or nuclear explosions. The resulting rapidly changing electric fields and magnetic fields may couple with electrical/electronic systems to produce damaging current and voltage surges.

Electrical Overcurrent (EOC) --An electrical event of either overcurrent that leads to electrical component or electronic system damage and failure.

Electrical Overstress (EOS) --An electrical event of either overvoltage or overcurrent that leads to electrical component or electronic system damage and failure.

Electrical Overpower (EOP) --An electrical event of overpower that leads to electrical component or electronic system damage and failure.

Electrical Overstress (EOV) --An electrical event of overvoltage that leads to electrical component or electronic system damage and failure.

ESD Protective Area (EPA) --An area of a room or building where ESD protection precautions and measures were taken.

Electrostatic Discharge (ESD) --ESD is a subclass of electrical overstress and may cause immediate device failure, permanent parameter shifts, and latent damage causing increased degradation rate.

Electrostatic Discharge (ESD) Gun --An ESD source that contains a metal tip and RC network inside the test source.

Electrostatic Shielding--Shielding used in electronic systems to prevent the entry or penetration of EM noise.

Electrostatic Susceptibility --The sensitivity of a system to EM interference.

Equipment Under Test (EUT) --Equipment or system that is being tested in a test system.

Equipotential --A surface where all points on the surface are at the same electrical potential.

Equipotential Bonding --A process where two objects are "bonded" whose electrostatic potential is the same to avoid ESD to occur.

ESD Control Program --A corporate program or process for addressing ESD issues in manufacturing and handling in a corporation.

Field-Induced Charging--Charging process initiated on an object after placement within an electric field. This is also known as Charging by Induction.

Horizontal Coupling Plane (HCP) --A surface that is typically a metal where coupling is made through the EM field in a horizontal position.

Human Body Model (HBM) --A test method whose source is an RC network with a 100 pF capacitor and 1500-Ohm series resistor.

Human Metal Model (HMM) --A test method that applies an IEC 61000-4-2 pulse to a semi conductor chip; only external pins exposed to system level ports are tested. Source can be an ESD gun that satisfies the IEC 61000-4-2 standard.

Inductive Charging --A charging process that uses an EM field to transfer energy between two objects.

Insulator --A material whose conductivity is less than a conductor and a semiconductor (less than 10-8 siemens per centimeter). Insulators are used to prevent low of electrical current.

Integrated Circuit --An electrical circuit constructed from semiconductor processing where different electrical components are integrated on the same substrate or wafer.

Ionization --A method to generate ions from atoms. Ionization techniques include both electrical and nuclear sources.

Joint Electron Device Engineering Council (JEDEC) --The JEDEC Solid State Technology Association, formerly known as the Joint Electron Device Engineering Council (JEDEC), is an independent semiconductor engineering trade organization and standardization body.

Japan Electronic and Information Technology Association (JEITA) --An association in Japan that addresses standardization body.

Latchup --A process electrical failure occurs in a semiconductor component or power system where a parasitic pnpn (also known as a silicon-controlled rectifier, thyristor, or Shockley diode) undergoes a high-current/low-voltage state. Latchup can lead to thermal failure and system destruction.

Latent Failure Mechanism --A failure mechanism where the damage created deviates from the untested or virgin device or system. A latent failure can be a yield or reliability issue.

Machine Model (MM) --A test method whose source is a capacitor network with a 200 pF capacitor.

Pin Under Test (PUT) --A pin in a printed circuit board (PCB) or a component that is being tested in a test system.

Printed Circuit Board (PCB)-- A circuit board where the signal lines are printed onto the board and components are mounted onto the board.

Semiconductor --A material whose conductivity is between a conductor and an insulator (in the range of 103 to 10-8 siemens per centimeter). Semiconductors are commonly used in integrated circuit component technology.

Small Charge Model (SCM) --A test method whose source is a capacitor network with a 10 pF capacitor.

Socketed Device Model (SDM)-- A test method for evaluation of the charging of a packaged semiconductor chip, followed by a grounding a pin. The semiconductor chip is socketed during the test.

Static Electricity --Electrical charge generated from charging processes that are sustained and accumulated on an object.

Surface Mount Device (SMD)-- A component that mounts onto a PCB, which mounts directly on the surface.

Surface Resistivity --The resistance of a material on its surface (as opposed to a bulk resistivity).

System Efficient ESD Design (SEED) --A system level design practice that integrates ESD and system co-design.

System Level IEC 61000-4-2-- A system level test that applies a pulse to a system using an ESD gun.

System Level IEC 61000-4-5 --A system level test to address a transient surge that applies a pulse to a system.

Transient Voltage Suppression (TVS) --A component or device that addresses electrical over stress by voltage suppression.

Transmission Line Pulse (TLP) --A test method that applies a rectangular pulse to a component (10 ns rise and fall time; 100 ns plateau)

Triboelectric Charging --A method that generates charging through contact electrification. Contact electrification is when certain materials become electrically charged after they come into contact with another different material and are then separated (such as through rubbing). The polarity and strength of the charges produced differ according to the materials, surface roughness, temperature, strain, and other properties.

Triboelectric Series --The ordering of materials according to their triboelectric behavior. Materials are often listed in order of the polarity of charge separation when they are touched with another object. A material the bottom of the series, when touched to a material near the top of the series, will attain a more negative charge, and vice versa. Tribo is from the Greek word for "rubbing," ??´ i?? (???? ´ ?: friction).

Ultra-Fast Transmission Line Pulse (UF-TLP)--A test method that applies a fast pulse to a component on the order of tens of picoseconds. This is presently not a standard.

Vertical Coupling Plane (VCP) --A surface that is typically a metal where coupling is made through the EM field in a vertical position.

Very Fast Transmission Line Pulse (VF-TLP) --A test method that applies a rectangular pulse to a component (1 ns rise and fall time; 10 ns plateau).

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