Reducing Noise in Digital Circuits via Bypassing and Decoupling


In the image below, notice the numbered blue arrows. These point to several noise-reduction techniques that are being employed to lower RF and EMI in an integrated-circuit (IC) chip and its immediate environment.

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(1) A ferrite bead is placed in series with the IC's DC power input pin (VDD). (2) A small electrolytic capacitor is used to further decouple noise from the DC power input. Notice that this capacitor's ground (-) pin is soldered directly to the copper-shielding tape; the copper tape is grounded (3). A small-value film capacitor (100 nanoFarad), which not visible because it's on the other side of the printed-circuit board, is also used to decouple noise from the DC power input. The copper shielding helps prevent the IC from spewing out contaminating EMI and RF and further reduces similar external noise sources from entering the IC.

The small-value capacitor may also be a SMD type which can be connected directly between ground and the power pin (VDD), as shown here:

This technique also shields the circuit as expected from copper; but, here the shielding effect is less important. This "technique" is not generally known in the industry -- hence it's not "approved" by anybody. Nevertheless, this little trick results in a measurable decrease of generated power supply noise at the VDD pin.

The shown "method" could not really make the ground loop shorter, but the applied copper foil provides a low-inductance path between the power pins, and makes possible for the circulating high-frequency spike current to follow a mirror path in that copper foil. If one has a full ground plane available on the PCB, and positions the SMD bypass capacitors in a similar way -- i.e., right under the chip -- then this same thing can be repeated in the "standard", industrial manner.

Also see: Ground Loops

Updated: Saturday, April 20, 2013 18:47 PST

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