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3. OPERATING SYSTEMS OVERVIEW
A microcomputer is one which has additional processor memory on-chip of a busy processing environment. Thus the growth of operating systems has realized powerful single CPU architectures like, CP/M for 8 bit. μps (“mu p s”); MS-DOS for IBM PCs and the UNIX with 32-bit machines for multitasking activities.
In essence, the software tools designed to aid the μC (“mu C”)user in performing a variety of tasks is called an operating system (OS). The view of OS is given in Fig. 4-9.
Fig. 9 Operating system view
Men can only be calculative due to the inherent facts of limited storage availability and still very less memory for arithmetic processing.
As the user needs increase both in terms of memory requirement') and computational power, one necessarily has to have a programmable machine which is essentially termed a computer. The system in operation governed by the operating system view is given in Fig. 9.
K is the Kernel , S is the system shell and it is the integration between K and S that throws open the system's ability as a programmable machine to the user community. The space coverage between K and S is only used as a Resource Manager software and the space between Sand s invites the manufacturers capacity to deliver standard packages, tools, libraries, compilers, editors, etc. to meet the diverging needs of a USER.
The need for a Language for communication as an on -line user of a machine as a serious concern has been felt very much and computer systems i.e., IBM PCs to multiuser environment like UNIX machines have become an acceptable standard in organizations.
The Architectural capture during the time till now has gained more emphasis on communications thus leaving the computing needs to a limited scientific user community.
All these machines are SISD (a sequence of instructions and a sequence of data) stored in memory and operated upon sequentially to get the solutions is the method followed on John Von Neumann architectures which is a standard today as shown schematically in Fig. 4-10.
Fig. 10 Von Neumann machine
An off-line system doesn't require the user while it performs the process as dictated by the input example being like IBM/360 batch processing systems.
The trend of other manufacturing giants like HP, APPLE is towards centralization or de-channelization of a multiuser environment in the application Base.
One of the hallmarks of UNIX is the fact that the user interface manager ( called SHELL) is a program like any other program and can be replaced.
The OS consists of the Kernel, the shell and utilities.
Read and Write are complementary operations in an interactive environment which goes on highly sequentially and silently.
More and more PCs now bridge the gap by using high-speed SRAM (static RAM) chips to cache traffic between the CPU and DRAMs. A typical 486 or Pentium system might have 256 KB of SRAM cache. But SRAM is much costlier than DRAM, and boosting cache beyond 256 KB yields a diminishing rate of return.
Enhanced DRAM
By integrating a small SRAM cache with a fast core of otherwise generic DRAM. Each EDRAM chip has 2 kb of 15- nanosecond SRAM and 4 Mb of 35-ns DRAM. The first Pentium systems (1993) didn't take full advantage of the new CPU (80486) 66 MHZ. Old designs are being adapted for use with faster processors. To boost critical I/O speed, engineers are using new bus designs and storage sub systems. Equally important, there are harnessing techniques such as redundancy, error correction, and predictive diagnostics to give 80 X 86 systems the reliability and manageability typical of hosts.
User functions such as voice annotation of documents or spoken attachments to E mail messages must be provided through software, and adding music functions requires additional hardware - either a dedicated synthesizer chip or a programmable digital signal processor. The Pentium provides a 64-bit memory interface and 32 bit I/O bus for load balancing. The Pentium will be the platform of choice for doing things like dual processor " multi-processing for reliability in the information age.
Tandem network is a configuration for standby redundancy in terms of multiprocessors for fault tolerance.
The need for high availability leads to things like redundancy, ECC ( error-checking and correction) memory, disk arrays and predictive diagnostics which drive the system architecture.
On-chip performance-monitoring registers maintain statistical information on cache , hits, bus transactions and average processor waits. The Pentium’s FRC ( functional redundancy-checking) mode lets two chips run side-by-side and compare their results in real time. Unfortunately, FRC mode doesn't indicate a resolution in case of an error, so it serves to flag but not solve data Integrity failures.
An operating system may have to meet the dual needs with the ability to support more than one user and the capacity to let one user simultaneously execute several tasks.
If the particular OS meets the above factors, it is termed a multi-user multi-tasking system.
MS DOS is a single user OS, which is very powerful as a Single CPU architecture is concerned. A multiuser system should incorporate certain definite features like user identity, system statistics, user protection (security), and provide better opportunity for on-line communication among the group of men evolving on a software project by means of a good I/O management protocol.
As OS may reside on a disk, or in ROM or both. Usually the static software strength sits on ROM and the other systems software (major portion) remains on disk to be used on demand both from the users and the microcomputer.
Some major constituents of an operating system include:
• Command interpreter
• File Manager
• Assemblers
• Linker -/Loader
• Text editor
• Compilers of various high level languages
• Certain utilities, mainly for I/O activities and to support modular programming.
Currently the multitasking as supports window manager. This is affiliated to the fast and powerful graphics activity on a communication base.
The window manager permits:
• opening a new window on screen;
• switching across windows( using mouses, lightpens etc.)
Activating a window. Some commercially available WMS (windowing mechanisms)
are from suntools, X-windows and PC tools which essentially form an ingredient of real time on-line user pipelining on a single CPU machine for better and artistic outputs.
This is supported by the CAD/CAE applications area of scientific users as well as the very dynamic and fluctuating commercial circles. On-line query is an important tool which suits for reliable and active database management systems.
With the ever increasing complexity of software management on Single CPU machines, a lot have come up as diagnostic tools in the hardware area mainly for system development and partly for service sectors of a powerful single CPU marketing associates.
For the ease of instruction decoding, it is preferable to have fixed length op-codes with single CPU machines which is followed by many a microprocessor family.
4. SOFTWARE STRENGTHS
Transistors, integrated circuits, and VLSI have resulted in dramatic decreases in hardware costs. On the other hand, software is labor-intensive, and personnel costs are constantly increasing. See Fig. 11. Similarly, software maintenance is an increasing portion of software cost because with passing time more software accumulates. The typical life span for a product is 1 to 3 years in development and 5 to 15 years in use (maintenance).
Software maintenance involves enhancing the capabilities of the product, adapting the product to new processing environments, and correcting bugs. Typical distributions of maintenance effort are 60, 20, 200% respectively.
Modem programming languages provide a range of features for software development activity. The factors include separate compilation, user-defined data types, flexible scope rules, and concurrency mechanisms. Usually, for a single CPU machine the structured programming methodology has been agreed as a major factor to decide its capability.
Pascal is a suitable tool towards software training methodology and COBOL, a well structured language is the strength to data processing activities.
Ada is named after Lady Ada Lovelace, during 1900s, known as the world's first computer programmer. This was developed for "embedded" computer systems. This provides computation, communication and control functions of a larger system which has to meet concurrency constraints and interrupt-driven real time processing. Strong type checking improves the quality of a program by catching errors in the declaration and use of data entities through a combination of compile time, load-time and execution time checks. Any feature must provide security to the system with rigid programmer flexibility.
Fig. 11 Changing hardware-Software cost ratio
Lisp is not suited to numerical applications nor is BASIC fit for list processing. The fundamental data structure in APL is the one-dimensional Vector array. FORtran permits mixed mode operations between similar data types.
Separate compilation
The ability to develop modules and subsystems, to compile and store them in libraries, and to have the loader automatically retrieve library units and link them into the object code of a system provides a powerful abstraction mechanism.
FORtran, to some extent, and Ada support the separate compiling aspects. Only the storage requirement is high but ensures speedy and safe operation of a product development on a uni-programming multiuser single CPU machine. Among the user-defined data, the Record type is a primary feature supporting me processing.
Concurrency Mechanisms
Two or more segments of a program can be executing concurrently if the effect of executing the segments is independent of the order in which they are executed. These program segments are referred to as tasks. On a single CPU machine, code segments, can be interleaved to achieve parallelism by a pipelined approach.
Two fundamental problems in concurrent programming are synchronization of tasks so that information can be transferred between tasks, and prevention of simultaneous updating of data that are accessible to more than one task. These problems are referred to as the synchronization and the mutual exclusion.
When variables are shared, multiple processes have access to a common region of memory. The use of semaphores, critical regions and monitors are used to arrest the problems that may arise otherwise.
In distributed processing environments, the asynchronous message passing is accomplished by use of buffers in concurrent tasks.
For synchronous message passing architectures, Ada calls its as a rendezvous; as exemplified in CSP. Deadlock is the worst outcome of concurrent systems which may prove the system as insecure. Here concurrency introduced by parallelism in software must take the machine architecture as a serious constraint and a sincere approach.
Petri Nets invented by Carl Petri in 1960 at the University Of Bonn, West Germany is a graphical representation technique for concurrent events.
Petri Nets are state oriented notations for specifying parallelism of operations. They are used to specify synchronization and mutual exclusion among concurrent operations.
This technique overcomes the limitations of finite state mechanisms for specifying parallelism.
Unit testing:
The performance of a CPU is derived by the individual programmer independently doing the unit testing:
Coding and debugging = Unit testing.
A program unit is usually small enough that the programmer can test it in greater detail (self-test) than will be possible when the units are integrated into an evolving software product. The routine types of tests include functional, performance and stress besides the exceptional structure tests.
Structure tests are concerned with exercising the internal logic of a program and traversing particular execution paths. This is called as "White box" or "glass box" testing.
This concerns with test coverage criterion for enhancing software reliability by detecting missing path errors, computational errors, and domain errors.
Debugging is the process of isolating and correcting the causes of known errors.
Commonly employed techniques include induction, deduction and back tracking. More often logical errors are the most common mistakes which lead to wrong branching or abrupt terminations (processor Halt). Hence the dual problems of verification and validation is a continuing task in a software development program. Process audits examine applied software engineering techniques and tools in practice for product support which can improve quality and productivity. The software strength really is reflected by embedded parallelism in machine regarding processor-memory interactions, system software and applied utility software.
5. MICROCOMPUTER DEVELOPMENT SYSTEMS
With the advent of microprocessors ( CPU on a chip), it has become literally possible to simulate any type of process to a desired level of accuracy. Still the wordlength and the instruction set of the processor playa dominant role to compete in qualifying to be the primary component of a development system. Thus microcomputer based development systems really call for desired level of expectations as the architecture is concerned, and more often they are to be of enormous capabilities as of a general purpose machine. The other ingredients like system software, language translation, hardware support, good and fast emulation techniques and dedicated real-time control applications add dimensions to the geographical geometry of the system. Varying designs in EPROM programmers attach intimacy in the realm of graphical user interfaces and complex adaptable instrumentation control systems involving fuzzy logics and neural computing. Thus from the above listed points, it becomes quite apparent that a very few systems can cater to this expert system involving reengineering of engineered software, strong dynamic microprograms availability, and a good fault-tolerant system with a definite finite state automata.
Some of the major application areas of MDS (Microcomputer Development Systems) are:
A large number of assembler environment for different machine level language users, an equally good amount of debugging and diagnostic tools, and a strong emulation team for portability and portability reasons in distributed processes. The debugger provides commands to disassemble object code into assembly language mnemonics, to trace program execution one step at a time, to insert breakpoints into user programs and examine and modify CPU registers.
In addition, it is expected of the prospective MDS to rise to the data-base management systems for in-house tailorable software development for information presentation and intelligence representation in the competitive export markets towards customer satisfaction.
Centralized data-bases and computer networks are crucial issues which attract attention from other related items like economy, security and authenticity in the global telecommunications scenario.
Instruction sequencing and interpretation used to activate the control Signals cause concern in the microprogramming arena. The state table approach with delay elements incorporation is normally followed on CPU designs. The sequence-counter method perform well for RISC machines, for many digital circuits are designed to perform a relatively small number of actions repeatedly.
Microprogramming calls for control data to be stored in a ROM or RAM called a control memory. Each machine instruction is executed by a microprogram that acts as a real-time interpreter for the instruction. Emulation is possible when working with two similar machine level languages. More knowledge of the machine is required and calls for micro-assembly languages so that executable microcodes can be stored directly on the control store. M.V. Wilkes (in 1951) proposed the microprogram design in which each bit of the control field corresponds to a distinct control line. Though naturally fixed length opcodes are preferable in machine instruction codes, the varying microinstruction length is attributed to the following factors, viz., the degree of parallelism required at the microinstruction level; the way in which the control information is represented or encoded, and the way in which the next microinstruction address is specified. Computers with writable control memory are often considered to be dynamically micro-programmable.
The cost of control memory is measured by two parameters: its width w, which is the number of bits per microinstruction; and height H, which is the number of microinstructions it stores. Another chaining of programs call for nano-programming (used in 68000 series of microprocessors) thus giving a higher flexibility in hardware control. System macros and macro calls are powerful micro-programs utilized to support the machine activities. Today micro-programmable machines with EPROM programmers and emulators are helpful as end control units in process instrumentation and distributed computer networking areas.
In striving for faster machines, designers have constantly migrated functions from software to microcode, , or from microcode to hardware. For example, by adding an instruction that requires an extra level of decoding logic, a machine's entire instruction set can be slowed. MIPS ( Microprocessor without interlocked pipe stages) of Stanford, a word addressed machine, is a RISC one of the research machines. The notion of moving functionality from run time to compile time ( compiler technology) is a novel computer RISC design. Me 68020 is a product of 60 men years of design effort. This chip is delivered using high density complementary metal oxide semiconductor process technology packaged in a 114-pin grid array offering a clock-rate of 16.67 MHz, with maximum of 1.75 watt power dissipation. The Acorn RISC machine (ARM) of Cambridge, England has a 32-bit data bus and 26 bit address bus. All instructions are 32 bits in length and has sixteen general purpose registers. Supervisor and interrupt modes have access to 9 registers unavailable to the user mode programs. These registers are used to minimize the interrupt latency and context switching times as well as provide support for simulating a DMA channel. Computer architectures have become complex enough that it is often difficult to analyze program behavior in the absence of a set of benchmarks to guide that analysis. One area where very high performance figures are required is in Artificial intelligence (A.I.). The performance rating of AI machines is measured in logical inferences per second (Lips). At times an array of ten thousand transputers could potentially deliver a similar performance figure.
6. CONCLUSION
Thus the pipelining method may include all the pipe steps in the voluminous sequential process. If certain pipe's are optional, then pipeline control becomes a serious problem because of tight synchronization requirement among the stages. When program loop segments are encountered it is desirable to provide a high-speed memory for these sensitive data in order to produce a sensible throughput on single CPU machines.
Some examples of pipelining include application of more similar functional modules as on a SIMD spectrum, a good architectural blend ever supporting the data flow machines (which requires computational split-up to the greatest degree because of hierarchical arithmetic execution priorities followed by languages) for primarily matching the bus and bandwidth bottlenecks, and to the realm of distributed processing real applications all mainly aimed at a short Turn-around-time ( better service) and thus enhancing the available thruput of systems. The other major concern is the domain of algorithms which may play a dominant role of sitting software strengths besides the dynamic professional software engineers implementing the difficult strategies said to the growing needs of parallel processing architectures. The future trend is more aimed at self verification in fault tolerant computing and automatic error control and recovery mechanisms in communication networks.
Thus, in principle with the system clock running high, a Single CPU pipelined machine can provide a better turn around time with or without virtual memory support.
TERMS
Pipelining, Instruction cycle, Speed-up, Architecture, Multiplexed bus, single-step, object code, semaphore, RISC, micro-programming, emulation, demultiplexer, fault-tolerance, 80486 CPU, fault tolerance, security, window-manager, fixed length opcode, concurrency, code segment, deadlock, Petrinet, debugging, re-engineering.
QUIZ
1. What is pipelining? Discuss its classification with respect to parallel processing
2. Explain the pipelined version of a floating point adder.
3. Write on specific advantages of counters as controlling elements in computational activity.
4. Write a machine language program selecting anyone microprocessor to generate dock pulses of time period equal to 1 ms with a duty cycle of 25%.
5. What are the merits of using multiplexed address-data bus on single CPU system?
6. What is a bit slice processor?
7. Explain in detail, the organization of any 8-bit microprocessor.
S. What is the purpose of instructions for disabling interrupts in I/O management?
9. Highlight on the SIM, RIM instructions of 8085 CPU for use in process control instrumentation measurements.
10. Bring out the essential differences of 8085 from that of ZSO microprocessor.
11. Explain the importance of segment registers towards memory segmentation.
12. Differentiate the user and supervisory states of Motorola 68000. 13. Write notes on microcomputer development systems.
14. Compare and contrast the use of fixed length and variable length opcodes towards microprogramming.
15. A number of computers have micro-instructions containing an "emit" field in which the micro-programmer can place an arbitrary constant for use as an immediate operand.
Give some general reasons for including an emit field in microinstructions.
16. Explain the use and implications of wait states of microprocessor instructions.
17. Account for the use of fault tolerant microcomputers in process-control instrumentation. What is data acquisition? 18. Correlate the implications of the inclusion of cache memory and process segmentation towards the benefit of pipelining.
19. Distinguish between Moore and Mealy machines.
20. What do you mean by computer architecture?
21. Distinguish the technique of defining Macros from user spelt subroutines.
22. Write a note on error-detecting codes for system reliability.
23. Explain the architecture of anyone RISC model you have come across.
24. Mention the advantages of 2's complement arithmetic towards pipelining in computer construction.
25. Name and explain some of the performance measures of application software on single CPU timeshared system.
26. What factors influence the selection of modular programming in distributed environment?
27. Scan on cognitive, augmentive and notational tools towards quality and productivity factors in software management Circles.
28. Write on Petri Net modeling to concurrent programming.
29. Comment on infix and post/prefix notations for computer arithmetic in data flow computing.
30. Give the equation for the cyclomatic number thanks to Mccabe. What is structured programming?
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