Plug-in data acquisition boards: Sampling techniques



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These techniques are discussed in the following sections:

• Continuous channel scanning

• Simultaneous sampling

• Block mode operations


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F.6.1 Continuous channel scanning

The method of sampling that facilitates the connecting of the required input channel to the A/D converter at a constant rate is known as continuous channel scanning. Continuous channel scanning allows channels to be sampled in a pre-determined and arbitrary order (e.g. channel 5, channel 1, channel 11), as well as at different sampling rates. An example of this would be the sampling of three channels in the following order (channel 5, channel 1, channel 11, channel 1). Channel 1 is being sampled at twice the rate as channels 5 and 11, which for an A/D board with throughput of 100 kHz represents a sampling rate of 50 kHz. Channels 5 and 11 are sampled at 25 kHz. There are two methods of continuous channel scanning, either under software control or by on-board hardware control.


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Software channel scanning:

Where continuous channel scanning is performed by software the address of the channel to be sampled is written to the multiplexer and the gain setting sent to the programmable gain amplifier (PGA), where one is fitted. Once the signal is settled, an A/D conversion is initiated. The data is subsequently read and transferred to the PC's memory. This incurs a large software overhead. Background operation using interrupts is difficult and slower than polled I/O and accurately timed samples and higher speed data transfer methods such as DMA and repeat instructions are impossible in either case.

Hardware channel scanning:

Continuous channel scanning is implemented in hardware using channel-gain arrays (CGA).

These programmable memory buffers contain a list of the channels and the gain settings required for each input channel to be sampled. When the A/D board begins sampling, input channels are sampled in the sequence loaded into the channel-gain array.

The use of on-board channel-gain arrays (CGA) overcomes many of the limitations associated with channel scanning using software and has the following advantages:

• The channel sequence information may be setup once and then sampling initiated (and repeated) with a single command. Once initiated, the sampling process is controlled by the A/D board's hardware.

• Arbitrary sample sequences may be defined.

• Within the limitations on the size of the CGA, different sampling frequencies may be specified for different channels.

• The speed of software-transfer methods such as interrupt and polled I/O is greatly increased, in many cases doubled. This is due to the fact that delays caused by the host computer transferring channel and gain information before each sample is taken, are avoided.

• Very accurate timing is achievable since the board hardware is optimized to control the individual sub-systems on the board.

• Advanced transfer methods such as DMA and repeat instructions are possible.

DMA transfer is controlled directly by the hardware on the A/D board and the host computer. This is not a very flexible arrangement, since it does not allow intervention by software to change the channels being scanned once a DMA transfer has been initiated. A/D boards, which are capable of DMA but don't have channel-gain arrays may only perform DMA transfers from a single input channel, whose address and required gain is setup by software before the DMA transfer is initiated. Where channel-gain arrays are implemented, the on-board hardware will automatically change the address and gain settings during the DMA transfer. Where repeat instructions are used to transfer information, usually from an on-board FIFO, the sampling of multiple channels must continue to be performed in the background. On A/D boards, which don't have channel-gain arrays, repeat instruction transfers may only be performed on a single input channel whose address and required gain is setup by software before the repeat instruction transfer is initiated.

Practical applications:

Some of the practical applications, which utilize the flexibility in the selection and throughput of individual channels, using hardware channel scanning, are detailed below.

Sampling different channels at different frequencies:

When signals with different frequencies are sampled (e.g., a heart rate electrocardiogram (ECG) with 300 beats/min and an electroencephalogram (EEG) with a frequency of 5 kHz), it's much more memory-efficient to sample each channel at around its Nyquist rate instead of scanning all channels at the rate of the highest frequency channel. In the example above, if the ECG rate is 2 kHz and the EEG rate is 20 kHz, then the ratio of the two channels is 1:10 . The CGA could therefore be setup with ten EEG readings followed by one ECG reading with a scan clock of, say, 22 kHz. (Note that this introduces a phase shift in the EEG readings since every eleventh reading is an ECG reading. This can be alleviated by ensuring that all channels are sampled evenly.) As a common ECG waveform is determined from three electrodes, a sequence of EEG, ECG1, EEG, ECG2, EEG, ECG3 with scan clock of 40 kHz yields an EEG rate of 20 kHz, and the sampling rate for each of the three ECG electrodes is 6.667 kHz.

Variable timing and scan rate

If the board has an external trigger and /or sample clock input, variable timing and scan rates are possible. The CGA is programmed and the board is simply left to wait for the external trigger. When the trigger occurs, the board automatically takes the required number of samples.

In machine analysis, the sample clock may be connected to an output on the machine proportional to its rotational speed. As the machine speeds up, the sample rate increases. Both these schemes allow for more efficient data collection by reducing the amount of redundant data that is acquired.

Post acquisition auto-ranging

While the CGA allows different gains to be set, sometimes the optimum gain is not known in advance. Using a gain factor that is certain not to saturate the A/D will result in poor accuracy when the input signal is at a low level, while a high gain may saturate the A/D when the opposite occurs, yielding meaningless readings. What can be done is programming the CGA to take two or more readings for the channel; e.g., one might be taken at unity gain and the next at a gain of 10. If the first reading is less than 1/10 of the full-scale, the second is used for greater precision. An example of an application would be the measuring of an object's response to destructive testing - e.g., to shockwaves. As the amplitude of the response is unpredictable and the test often renders the object unusable for further testing, it's imperative that the first, and perhaps only, set of readings are useable.

While the use of channel-gain arrays on A/D boards has greatly increased the flexibility in the selection and throughput of individual channels, continuous hardware channel scanning does not provide adequate results for applications that require the simultaneous sampling of multiple channels. This requirement is discussed in the following section.

F.6.2 Simultaneous sampling

When the input multiplexer switches between channels, a time skew is generated between each channel sampled. On an A/D board being sampled at its maximum total throughput of 200 kHz, the minimum channel-to-channel time skew between samples on different channels is 5 µs. Since the skew is additive from channel to channel, the total time skew between the first and last samples, when 16 channels are being sampled, is 80 µs. Time skew between signal measurements taken on different channels can lead to an inaccurate portrayal of the events that generated the signals as demonstrated in ill. F.22.

ill. F.22 Time skew between channels

In ill. F.22, channel 1 is sampled properly since it's deemed the reference channel.

Channel 2 exhibits time skew as samples 1 and 4 show significant errors relative to their actual values at the time channel 1 was sampled.

Where the time relationship between each channel sampled is unimportant, or the skew is negligible compared to the speed of the channel scan rate, such delays are not significant. In many applications, however, such as those dealing with accurate phase measurements or high-speed transient analysis, time skew between channels is unacceptable, since it's crucial to determine the output of several signals on different channels, at precisely the same time.

To avoid the timing errors introduced when continuously sampling from one input channel to the next, special applications require A/D boards capable of simultaneous sampling. These A/D boards are fitted with so-called simultaneous sample and hold devices on all input channels. The sample and hold device on each input channel holds the sampled data until the A/D converter can scan each channel.

The maximum possible difference in sampling time between the channels, usually introduced as a result of variations in the aperture time of the individual sample and hold devices, is the time variable known as the aperture matching, or sometimes known as aperture uncertainty. This measurement reflects the maximum possible difference in sampling time between channels. The aperture uncertainty can be calculated from the maximum input frequency of the signal to be sampled. For an error of less than 1-bit on a 12-bit A/D board, this is about 800 ns at 100 kHz, 1.6 ns at 50 kHz, and so on. Boards with aperture matching of the order of 0.4 ns ( ± 0.2 ns) are available.

Dedicated plug-in boards that perform the function of simultaneous sampling, when it's not available on the main A/D board, can be interfaced easily to the A/D board with the necessary conversion strobe signals.

F.6.3 Block mode operations

Where channel-gain arrays are available on an A/D board, an additional method by which a group of channels can be sampled almost simultaneously becomes available. Block mode triggering, sometimes known as burst mode triggering or interval scanning, creates the effect of simultaneous sampling, while maintaining the lower cost benefits of continuous channel scanning.

When operating in continuous scanning mode, conventional A/D conversion triggering works as follows: The sample trigger source, either from software, an on-board pacer clock, or an external clock, is programmed for a specified sample rate. Each sample trigger initiates a single A/D conversion on the next channel in the channel/gain array and every sample is evenly spaced in time.

Block mode triggering initiates an A/D conversion on all the required input channels at the maximum sampling rate of the A/D board, every time a sample trigger pulse occurs. A second counter is used to trigger the sampling of each of the channels at the maximum sampling rate. The number of samples to be taken in each block is typically stored by software in an on-board buffer, while the channel and gain for each sample in the block is read from the channel/gain array. The scan sequence is repeated at the next sample trigger pulse.

Consider an example where four channels are being sampled at a total throughput rate of 20 kHz, corresponding to a channel scan rate of 5 kHz. ill. F.23 shows that in continuous scanning mode, the total scan time is 200 µs, with the samples evenly spaced every 50 µs. In block trigger mode, the four samples are taken in a single scan sequence at the maximum throughput of the board. Assuming the board is capable of taking samples at 200 kHz, the time between each of these four samples is 5 µs, while the total time taken for all the samples is 20 µs instead of 200 µs.

ill. F.23 Conventional and burst trigger scanning

Where the sampling rate remains the same, that is, a sample trigger occurs every 50 µs, the throughput of the board is increased by the number of samples taken in each sample block. In this case, the throughput would be increased to 80 kHz. To maintain the total throughput rate at 20 kHz the sampling rate must be reduced by the number of channels sampled in each block. This is called the burst trigger rate and can be calculated by dividing the throughput required by the number of channels to be sampled.

Burst trigger rate = Required total throughput/No channels

For each burst trigger, the A/D board generates the required number of A/D conversion triggers at the maximum speed of the board. Even though the samples in a block (except the first sample) are taken at different times to the conventional triggered samples, the throughput of each channel and the time between samples on the same channel remains the same.

When using block mode triggering, data appears at the output of the A/D converter at the maximum throughput of the board. Therefore, for high-speed boards, the data transfer rate and therefore the method of transferring the data may need to be considered. For a large block count, DMA transfer, where available, will need to be used, while for small block counts, polled I/O or interrupt I/O, may be used where an on-board FIFO is utilized.

A little care must be taken when using block mode triggering with variable channel rate sampling, where some channels are sampled more often than others. it's possible that very large phase shifts are introduced because of the different times at which the two methods sample the data. Where variable channel rate sampling is used, conventional continuous channel scanning should be used.

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Updated: Sunday, May 1, 2011 7:42 PST