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The two main types of memory are random access memory (RAM) and read only memory (ROM). Two types of RAM are static RAM (SRAM) and dynamic RAM (DRAM). There are several types of ROM, including mask-programmed ROM, PROM, EPROM and EEROM.
Decoders are used to route signals to or from a specified location in memory. A real time clock relieves the CPU of timekeeping duties.
There are two main types of memory:
• Random access memory -- used for temporary storage. Data may be written into it at any time, and later read from it
The data is lost when the power supply is switched off. Used for the storage of data and for programs copied from more permanent data stores such as magnetic disks.
• Read only memory -- used for permanent storage. In most types, the data once written into it can not be changed. Used for storing programs and data tables.
Random access memory -- This occupies most of the available address space in a typical micro computer. A PC when purchased may be equipped with 32 Mb of RAM, with room for expansion to 64 Mb or more. The RAM is used for the temporary storage of programs and data. There is usually less need for RAM in a microcontroller system, as their programs are permanent and are stored in ROM instead (see below). The RAM is usually included on the microcontroller chip, and may consist of as few as 64 bytes.
Whenever data is read from RAM, it is copied in a register of the CPU.
Conversely, it is copied from the CPU when it is written into RAM. In either case, the original data remains unaltered after copying. This is known as non-destructive readout.
Once data is stored in RAM, it remains there until it is either:
• Overwritten and replaced by new data, or
• The power supply is switched off.
There are two types of RAM:
Static RAM (SRAM). Each SRAM IC contains an array of flip-flops, each one of which can be set or reset to one of its two states and so represent a logic 0 or a logic 1. The flip-flops may be individually addressable, or they may be addressed in groups of 4 (a nybble) or 8 (a byte) or 16 (a double byte, also known as a word). An example is the 6116 SRAM, which has its 16K flip-flops, arranged in 2K groups of eight (FIG. 1). The address decoder is included on the chip. To address 2K locations requires 11 address lines (2^11 = 2048). Since each location stores a byte, the IC has eight data lines for input/output.
Typically, the time needed to read or write a byte of data (the access time) is 100 ns compared with 20 ns for a hard disk and 200 ns for a floppy disk.
FIG. 1 The 6116 SRAM holds 2 KB bytes of data. It therefore needs 11
address inputs and 8 data inputs/outputs. It has OUTPUT ENABLE and WRITE
ENABLE inputs which must be made low for reading and writing respectively,
but the chip will take no action un less the CHIP ENABLE input is made low
at the same time.
Dynamic RAM (DRAM). A DRAM IC consists of an array of MOS FET transistors. Each of these can be switched on by storing a charge on its gate. Writing to DRAM consists of charging or discharging the gate.
Reading consists of finding out if the transistor is on or off by registering the level (0 or 1) it produces on the data line. The single transistor of a DRAM location is much smaller than the flip-flop of a SRAM location so many more locations can be accommodated on a DRAM chip. For example, a typical large SRAM IC stores 4 Mb, but the equivalent large DRAM stores 16 Mb. This makes large memories easier to build. In addition, DRAM access time is only 70ns, which is an advantage in computers, for high-speed operation.
The problem with storing a charge is that it eventually leaks away. This means that the data stored in the transistor must be refreshed at regular intervals. Under the control of a clock running at about 10 kHz, the remaining charge on a transistor is passed on from one transistor to another and topped up during the transfer. In this way the data is kept 'on the move', giving this type of memory the description 'dynamic'. The need to refresh memory means that a certain amount of the computer's operating time must be set aside for this. The DRAM can not be used for reading or writing during this time. This makes the operating system more complicated to run.
Read only memory
ROM is a permanent or semi-permanent form of memory. Unlike RAM, it does not lose its stored data when the power is switched off. This is why it used for storage of the booting routines in microprocessor systems. In microcontroller systems such as the cordless telephone and the multimeter, the program is unalterable and is stored in ROM during manufacture. In the larger more 'intelligent' microcontroller systems such as a data logger there is ROM to store the basic routines, with a medium-sized RAM as a temporary store for programs that are currently in use.
There are several kinds of ROM, including:
Mask-programmed ROM: Special masks are used when the chip is made, so that the content of every memory location is fixed from the beginning. It can never be altered. In other words, the ROM is a special kind of logic device in which each different combination of logic levels on the address bus produces a corresponding combination of logic levels on the data bus. Making special masks is very expensive, so this type of ROM is used only when it is known in advance that thousands of them will be required. For example, it might be suitable to mask-program a ROM for use in a popular model of a washing machine.
PROM: This is programmable ROM, which is programmed after it is manufactured, but the program can not then be altered. It is sometimes referred to as one time programmable (OTP) ROM. FIG. 2 shows how the programming is done. In the simplified circuit in the diagram, there are only three address inputs for the memory locations, which can be decoded to one of eight addresses. There are four data output lines, which run across the lines of the memory locations. At each place where the two sets of lines cross there is a transistor connected as in FIG. 3. The emitter of this has a fusible link connected to it. This thin connection can be 'blown' by passing a relatively large current through it when the ROM is being programmed. To blow it, we connect the data output line to 0 V and then apply a high level to the memory location line. If V+ is made higher than usual, a large current flows through the transistor and melts, or fuses, the link. All of this can be done automatically with the PROM plugged into a socket on a special PROM programmer. This is loaded with the data or program to be put into the PROM. It works through the memory locations one at a time, either blowing a link or leaving it unblown.
FIG. 2 A PROM consists of an address decoder, a line for each memory
location and a set of data output lines. Where they cross, there may be
a link between the memory line and the data output line.
FIG. 3 There is a transistor at every crossing point in FIG. 2, linking
the memory location to the data line through a fusible link. This link may
be blown when the PROM is programmed.
Example:
FIG. 4 shows the links of memory location at address 011 (3 in decimal). Two have been blown and two left unblown. After the PROM has been programmed, it is ready for use as ROM in a microelectronic system. The voltage +V used for reading the ROM is not as high as it was for programming. Turning on the transistor now does not blow the unblown links. When a memory line is addressed, it goes high and turns on the transistors that have unblown links. Currents flow through these to the data bus and are equivalent to a stored '1'. No current flows where a link is blown and is equivalent to a stored '0'. In FIG. 4, the blown and unblown links produce a nybble of data equivalent to 1010.
FIG. 4 The PROM is being programmed with data 1010 in locations 011.
An extra high voltage is applied to the location line, while the appropriate
data lines (D0 and D2) are connected to 0 V. This blows the two links where
shown, leaving the other links intact. When the PROM is in use, a high level
on the location line produces high levels on D1 and D3, but D0 and D2 remain
at logic low.
Blowing the links destroys them permanently, so a PROM can be programmed only once. If a mistake is made in programming, or the data needs to be altered, another PROM must be programmed with the corrected data. In the early stages of development of a system PROMs are programmed singly until the program and the device in which it is to be used have been fully tested. Once a correct version of the program has been developed, the mass programming process is automatic and reasonably inexpensive.
EPROM: This is erasable programmable ROM. The ROM consists of an array of MOSFETs, one for each bit. During programming, a charge is pulsed on to the gates of those MOSFETs that are to be set to '1'.
The principle is similar to that of DRAM except that the charge remains for very much longer, usually for several years. EPROMs have a quartz window though which the chip can be exposed to ultraviolet light if the data is to be erased. Ultraviolet is an ionizing radiation and the ions produced in the chip discharge the gates and erase the data.
An EPROM can be reprogrammed after erasing, which makes it very suitable for use when a system is at the development stage and frequent revision of the program and data are needed.
EEROM: This is electrically erasable ROM, which can be programmed and reprogrammed while still connected in its circuit. The ROM of many microcontrollers is of this kind. Although this type of ROM could be used for temporary storage in a way similar to RAM, writing new data into EEROM is too slow for this to be practicable.
Some microcontrollers are made in two versions, with an EEROM program memory or with a PROM program memory. The EEROM version is used at the development stage, then the PROM version is used for mass-production of the finalized program.
Addressing memory
The example given here explained how to decode a single device located at one particular address in the computer's address space. In practice, devices such as disk drives, I/O ports and the keyboard have several registers in them and each of these has its own address. This Fig. shows several gates being used to decode just one address. However, it is possible to decode a number of adjacent addresses with only a small amount of additional logic. Devices which occupy a range of addresses often have a decoder included on the same chip, so there are fewer problems for the system designer.
A memory chip is a good example of a device which occupies a block of adjacent addresses, and which contain its own decoder. In FIG. 5, the 6116 RAM chip has 2K (2048) memory locations within it. Each location has 8 memory cells, so each location holds a byte of data. The chip has 8 data input/output pins so that the microprocessor can either write or read a byte at a time. Whether there is a read or a write operation depends on the state of the two control lines shown in Fig. 5. If the OUTPUT ENABLE is made low, the addressed data is put on the bus. If the WRITE ENABLE is made low, data from the bus is stored on the chip at the addressed location.
FIG. 5 Decoding the 16K addresses within the eight 6116 memory ICs
is made simpler because each 6116 has its own internal decoder and the 74137
contains all the logic needed to decode the upper three address lines.
The 2K storage locations of a 6116 require an address bus 11 bits wide to address every location. The 6116 has a built-in decoder with 11 address inputs A0 to A10. To increase the amount of memory in a system we can use several 6116s, and access these one at a time. Each 6116 is connected to the data bus, to the control bus, and to bits A0 to A10 of the address bus. The eleven address bits address the corresponding location in every one of the eight chips.
The next problem is to select just one of the eight chips. To select one out of eight requires three lines, which we will name A11, A12 and A13. The figure shows how we use them. They go to a decoder IC known as a 3-line-to-8-line decoder (or multiplexer). The three address lines are connected to the input lines A to C. Normally, the outputs of the decoder are high but, when any one output is addressed by the inputs at A to C, it goes low. When all three inputs are low for example, output 0 goes low. When A and C are high and B is low, output 5 goes low. As an output goes low it enables the selected 6116, which then can be written to or read from.
Example:
Given the address $1E6D, how is this decoded? Write the address in binary:
0001 1110 0110 1011
The lower 11 bits go directly to the 6116s. The lower 11 bits are 110 0110 1011 in binary or $66D, so byte $66D is addressed in all eight chips. Which of the eight chips will function at this stage depends on the top 3 bits of the address, which are 011. In the decoder, input A is 1, input B is 1 and input C is 0. This selects output 6, so the seventh chip in the set is selected. Data is read from or written to this chip only. The data at the corresponding address in the other seven chips is ignored.
In this way, the eight chips cover these addresses:
Chip no. Address range (in hex)
0 0000 to 07FF
1 0800 to 0FFF
2 1000 to 17FF
3 1800 to 1FFF
4 2000 to 27FF
5 2800 to 2FFF
6 3000 to 37FF
7 3800 to 3FFF
The highest address is $3FFF. In decimal, this is 16383, so the set of eight chips stores 16K. Just to confirm the calculation, the address bus has 14 (11 + 3) bits, so the number of addresses is 2^14 = 16384 = 16K.
Many systems have a 16-bit address bus, but the circuit of FIG. 5 is unaffected by the values of the top two bits. These can take the values 00, 01, 10 or 11, but they are not decoded and make no difference to the result. The effect of this is that there are 'ghost' addresses with different values for the top two bits.
Example:
Consider the lowest address in chip no. 5, which is $2800.
Preceding this address by values of lines A14 and A15 can alter the value of the most significant hex digit. The last two bits of this remain the same (10) but the first two may vary. We can have 0010, 0101, 1010 or 1110. In hex these are 2, 6, A and E.
The real address is $2800, and the ghost addresses are $6800, $A800 and $E800. Chip no. 5 is enabled if any one of these ghost addresses is placed on the bus.
Allocation of addresses
With a 16-bit address bus, for example, a system has 64K different addresses. This is the address space of the system. This does not mean that there is a device or memory location at every address, waiting for the CPU to call it into action. The address space is the range of possible addresses. The addresses that are actually used depend on what devices are present in the system. When you purchase a computer, it may often have only a limited amount of memory. Later you may want to expand the system by purchasing additional memory boards. These plug into sockets on the motherboard, which are already provided with decoders to place the new memory in a range of previously unused addresses. The same applies with new input/output devices that you may wish to add to the system. Each must be allocated its individual address, or range of addresses. Often the operating system takes care of this automatically, but there can be occasions on which two different devices are allocated the same address. This always leads to problems of conflict.
The allocation of addresses may be visualized by drawing an address map. This is often called a memory map because most of it is occupied by memory of various kinds. The map in FIG. 6 is typical of a small computer or microprocessor system with a 16-bit address bus, capable of addressing up to 64 kilobytes. The first kilobyte is given over to one or more memory chips that store the booting routines. When we start (or boot) a system the microprocessor needs to be told how to get the system ready for operation. It automatically goes to address $0000 and there reads the first byte of the first instruction. Reading on through the bottom kilobyte it finds further instructions for getting the system booted up. This first kilobyte also contains interrupt service routines.
The purpose of these is explained later. Note that the routines in the first kilobyte must be available when the system is first switched on.
For this reason, the memory in this range of addresses is ROM.
FIG. 6 The address allocations of a typical microelectronic system
that has a 16-bit address bus.
Usually the input/output devices such as the printer and the disk drives are located next above the booting and ISR routines. There are spare addresses in this space, so that other devices can be added to the system when required.
The upper part of the address space is occupied wholly or partly by RAM. The area is usually divided into two parts, the program area and the data area. The program area is used for holding the program on which the system is currently working. With many complex programs, there is not enough address space to hold the whole program at once.
Different sections of the program are loaded into the program area from the disk drive and replaced with other sections as the microprocessor requires them. This is why you often hear the disk drive of a computer switching on and off automatically while you are running a program. The top end of memory is generally used as a data storage area. Here it stores data on which it is currently working, including values obtained in the intermediate stages of calculations.
Data is being stored, read, and replaced continually as the system goes about its tasks.
A system can operate with only a portion of its program and data areas actually occupied with memory. The system adjusts itself to work within whatever memory is available. The larger the memory, the larger the sections of a program that can be held there at one time. The larger the sections, the less often the microprocessor has to pause in its operations while the next section and its data are loaded.
Real time clock
Every system must have a system clock to drive the processor. A real time clock is optional. It functions like a digital watch, keeping account not only of the time but also the date, the day of the week, the day of the month, the month and the year. It includes logic to make it give February twenty-nine days in a Leap Year. It also has an alarm function to produce a signal at any preset time. In addition, it can be programmed to generate a pulse to interrupt the CPU at regular intervals.
To the CPU the real time clock is a block of addresses in which time and date are updated automatically once they have been set. The CPU writes into or reads from these addresses just as it does with memory.
In some types of RTC the addresses used for times and dates are part of a larger block of RAM that is available for other purposes. The RTC always has to have its own back up battery so that it does not stop working when the system is switched off. This makes the clock's spare RAM useful for storing data that must not be lost.
All of the functions of the real time clock except interrupt generation could be performed by the processor itself, if it was programmed to do so. This would have two serious disadvantages. One is that the processor would be kept so busy with time-keeping functions that it might have too little time to spare for doing anything else. Another disadvantage is that the action of a processor can be interrupted when it has to attend to something urgent. Interrupting the clock action would make the clock lose time. It is better to give the time-keeping task to an independent IC.
There is a detailed study of an RTC in SECTION 10.
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EXERCISE 1 Investigating memory --- Connect up a 6116 or another DRAM chip on a bread board. It needs connections to the positive and ground (0 V) rails of a +5 V supply. Input to the address, data and control terminals of the IC can be provided through switches (Fig. 2.6) or by simply plugging in wires to connect them directly to the supply line or 0 V line.
Output from the data terminals may be read by connecting LEDs, as shown here. Either use a low-voltage filament lamp as shown or LEDs in series with a 270 ohm resistor.
The base resistor of each transistor should be about 10 k-ohm.
Try to store a value in one of the locations of the IC. Make the control inputs high so that they are inactive. Set up the address bus and the data bus with suitable values. Then make the write enable line low. Finally, make the chip en able line low, then high again to latch the data. Note that these instructions may need to be modified to suit the type of RAM used.
Now try to read the data you have written, with LEDs connected to the data outputs. Set up the address but to the same address as before. Make the output enable line low, then the chip enable line.
EXERCISE 2 -- Addressing memory -- Extend the circuit used in Section 2, EXERCISE 1 by adding a decoder, as in FIG. 5. Decide on one or two addresses, set the lower bits by connections to the RAM. Set the upper bits by connections to the decoder. Connect the chip enable input of the RAM to the appropriate output pin of the decoder.
Try to write and read to various addresses in the RAM.
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Problems on memory
1. Describe RAM and the way that it is used in microelectronic systems.
2. Compare the functions of RAM and ROM.
3. List the different kinds of ROM, and give examples to illustrate the ways in which each kind is used.
4. Draw a diagram similar to FIG. 4 but with 4 address lines and 6 data lines. Show the state of the links when the value decimal 35 has been blown into address $5, and the value decimal 21 has been blown into address $E.
5. On a copy of FIG. 5, write in the voltage levels (0 or 1), that would be present when the value decimal 99 is being written into address $0372.
6. Design a SRAM to store 128 Kb (kilobytes) of data in four blocks of 32 Kb each. Use a supplier's catalogue and/or manufacturer's data sheets to select a suitable type of RAM and decoder. Draw a diagram to show all the connections.
7. Repeat question 6 for a SRAM to store 48 Kbits of data in three blocks of 16 Kbits each.
Multiple choice questions
1. Which type of memory must be refreshed while the system is running?
A EEROM.
B SRAM.
C DRAM.
D Mask-programmed ROM.
2. Which type of memory is most suited to store the program in a reprogrammable microcontroller?
A EEROM.
B DRAM.
C PROM.
D Mask-programmed ROM.
3. How many address lines are needed to address all the locations in a 4K ROM?
A 10.
B 12.
C 14.
D 17.
4. How many locations can be addressed by a CPU with a 14-bit address bus?
A 16 384.
B 8192.
C 8191.
D 32 768.
5. The number of address lines of a ROM that stores 1 Mbits as bytes is:
A 16.
B 20.
C 17.
D 10.
6. To make a memory chip store data from the bus we must:
A make the WE line and CE lines low.
B make the OE line low.
C make the WE line high.
D make the CE line low.
7. To make a memory chip place stored data on the bus we must:
A make the CE line high.
B make the WE and CE lines low.
C make the CE and OE lines low.
D make the OE and WE lines low.
8. The typical access time of DRAM is:
A 70 ns.
B 100 ns.
C 25 ms.
D 250 ns.
9. The typical access time of SRAM is:
A 70 ns.
B 10 ns.
C 250 ns.
D 1 ms.
10. A kilobyte is:
A 1000 bytes.
B 1024 bits.
C 1024 bytes.
D 1000 bits.
11. The kind of memory used in a microcomputer for storing the booting up program is:
A cache.
B SRAM.
C DRAM.
D ROM.
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