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The controlling center of a microelectronic system is its central processing unit or CPU. A typical microcontroller, the Atmel AT90S1200, and a typical microprocessor, the Zilog Z80, are examined in detail, and compared with other popular units of the same type. The architecture of microcontroller systems is compared with that of microprocessor systems. The bus of microprocessor systems is seen to comprise a data bus, an address bus and a control bus.
The functions of each are described. In connection with the data bus, the purpose of three-state outputs is described. Discussion of the address bus centers on address decoding. The functions of the signals on the control bus of the Z80 are explained. The system clock co-ordinates the activities of the CPU and the other units in the system.
As we have seen in SECTION 1, a microelectronic system has a number or fairly standard parts:
• the CPU.
• the system clock.
• conductors for carrying signals between the CPU and the other parts of the system.
• memory, of various kinds.
• an assortment of input and output circuits and devices, mainly depending upon the application.
The controlling center of a microelectronic system is the CPU. Its function is to read data from certain parts of the system, to act on it (process it) and to output the results. As explained in SECTION 1, microcontrollers differ in several ways from microprocessors, so we consider them separately. There are several hundreds of different microcontrollers and microprocessors. In this SECTION we consider a few typical examples.
Microcontrollers
FIG. 1 The pinout of the 1200 illustrates the way we number the pins
of ICs when there is a row of them down each side of the IC. As viewed from
above (pins pointing down to the circuit board) pins are numbered from 1
down the left side, continuing up the right side. A notch indicates the
end of the IC where pin 1 is located.
Some makers mark this end with a dot or a stripe instead.
As our first example of a CPU, FIG. 1 shows a commonly used microcontroller, the Atmel AT90S1200, which we shall refer to as the '1200' for short. Remember that this is a complete system on a single chip so its use of terminal pins (its pinout) is very different from that of the microprocessors that we describe later. This simplicity is what makes systems based on microcontrollers so much easier to design and build. The terminal pins fall into four main groups:
• power lines - the positive (VCC) and 0 V (GND, short for ground) lines connect to these pins. The voltage between them should be in the range 2.7 V to 6 V.
• crystal - the system clock circuit is inside, except for the crystal, which must be connected across these two terminals, XTL1 and XTL2. The maximum crystal frequency is 16 MHz.
• I/O ports - there are two of these, port B and port D (larger 40-pin members of this series also have ports A and C). Port B has 8 pins, PB0 to PB7, while port D has only 7 pins, PD0 to PD6. The 'bits' of each port (the individual pins) can be programmed as inputs or as outputs.
• reset - this line is held high when the CPU is running. A low level (0 V) on this line resets the system.
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Numbering digits
When a number consists of more than one digit, they are numbered from right to left, starting with number 0. For example, in the number 5239, D0 is '9', D1 is '3', D2 is '2' and D3 is '5'. D0 is always the least significant digit (LSD).
In a 4-digit number, D3 is the most significant digit (MSD).
In the '1220' IC (FIG. 1) the eight terminals of port B are numbered from PB0 (LSD) to PB7 (MSD), using the same rules.
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Parallel and serial data
Digital data are transferred from one place to another either in parallel or in series.
Serial transfer (Fig 2) requires only one line, along which the voltage levels are sent one after the other.
In parallel transfer (FIG. 3), a binary number is represented by high and low voltages placed on a set of conductor lines at the same time. Transfer requires a separate line for each bit.
Parallel transfer is quicker but requires more tracks on the circuit board, more terminals on the ICs and may require more buffers at each stage to relay the signals. It is used inside computers and other data-processing equipment (such as modems) to provide speed. In contrast, serial transfer needs only one track, one terminal and one buffer at each stage, but it is much slower. It is often used for communicating between microelectronic systems, particularly by the telephone system or by radio links, where only one channel is available.
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FIG. 2 Serial transfer of a byte of data uses only one data line but
takes about 8 times as long as parallel transfer.
FIG. 3 Parallel transfer of 1 byte (8 bits) of data requires 8 data
lines, D0 to D7.
In order to keep the size (or more exactly, the number of pins) of the IC reasonably small, manufacturers often allocate two or more functions to the same pin. In the instance of the '1200' the I/O pins PB5, PB6 and PB7, together with the RESET pin, can also be used as a serial port for downloading a program from a computer (such as a PC) to the memory inside the '1200'. In serial transfer of data, high or low pulses are fed into or out of the pin one after another (FIG. 2).
It can be seen that the pins of the '1200' provide all the essential access to the system: a power supply, a timing crystal (too big to go on the chip), a way of quickly resetting the system, and connections for sensors and actuators for inputting or outputting data.
Data can be fed to the '1200' in parallel (FIG. 3). That is, we simultaneously send a '1' or '0' along its 8 Port B lines and so load it with 8 bits (a byte) of data in a single operation. We can do the same thing with Port D, except that this has only 7 bits. Similarly, we can read (in parallel) a byte from Port B or a 7-bit group from Port D.
As might be expected from their name, microcontrollers are mainly used in control applications. A port may receive a byte of data from a temperature sensor, the value of the byte representing the temperature.
In the other direction, the port may output a byte of data to control the speed of a motor. However, the input from a sensor may not be a byte but a single bit.
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Other controllers -- the PIC family
The Microchip PIC family of microcontrollers has many and varied members. Some of the smallest are in a standard 8-pin IC package (FIG. 4). The 12CE518 runs on 2.5 V to 5 V, with a frequency up to 4 MHz. It has a program memory (PROM or EPROM) of 512 bytes. It also has 25 bytes of RAM and 16 bytes of EEPROM, which can retain stored data for as long as 40 years.
Programs are loaded serially and there are six I/O pins.
Members of this family are RISC processors. The 12CE518 has only 33 instructions in its set, so learning to program it does not take long. All of its instructions except branches take 1 µs to execute. Branches take 2 µs.
It has a built-in timer that can function as a real time clock.
It also has a watchdog timer that has its own oscillator to ensure reliability.
Another RISC (35 instructions) microcontroller is the 16F872, which is typical of the more advanced members of the PIC family. It is in a 28-pin package, which allows it to have three I/O ports that are 6, 8 and 8 bits wide. It runs at 20 MHz. It has 2K × 14 words of FLASH reprogrammable program memory, 128 × 8 bytes of RAM and 64 × 8 bytes of EEPROM. On the same chip there are three timers, a watchdog timer with its own oscillator, a 10 bit analogue to digital converter, a synchronous serial port.
It can be programmed to capture a 16-bit value at regular intervals, which gives it application in data acquisition. The captured data can be compared with a value in another register and produce an output signal if the two are equal.
There is also a pulse width modulator to generate pulses of a set length. In total, this is a very versatile controller with many applications in control systems and measurement systems.
There is a wide range of development equipment and software to help the PIC programmer. These include assembler programs and software for programming in the C or BASIC languages. The Stamp 2 is a complete microcontroller system based on the PIC16C57. It includes a compiler for PBASIC, which is a version of BASIC devised for making best use of the features of the 16C57.
Some programs for the Stamp 2 are provided later in this guide.
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FIG. 4 The smaller PIC microcontrollers have only 8 pins.
Some pins share several functions.
Example:
In an industrial plant, either a valve is closed or it is not closed.
The sensor is a microswitch on the valve, which closes when the valve is closed. The signal is sent from the microswitch to one of the port pins of the CPU. It is a high voltage (logic 1) when the valve is closed and is a low voltage (logic 0) when the valve is not closed. The signal is a single bit.
Example:
Either the temperature of a vessel has reached the required level or it has not. We can represent these conditions by input from a thermal sensor at just one pin of Port B. The input is high when the temperature has reached the required level and is low when it has not. Again, the signal is a single bit.
The same applies to many actuators. If a motor is either running or not running, only a single bit is required to switch the motor on (1) or off (0). For this reason, the individual bits of each port may be configured as inputs or outputs, and the output and input values set individually.
On the '1200' we could have up to eight different sensors, or eight different actuators (or a mixture of both) connected to Port B and seven more connected to Port D.
When it is important to keep the size of the IC (and therefore the number of pins) to a minimum, it is possible to transfer data serially into or out of the microcontroller. Then we need only a single input/ output pin. An example of this is seen in the '1200' microcontroller. In programming mode, the pin PB5 (see FIG. 1) is used for serial input of programs. Pin PB6 is used for serial output, when the program is read back into the programming PC to verify it. PB7 is used as a clock input for the serial data transfers. The main disadvantages of serial data transfer are that it takes longer than parallel transfer does and that the programming is more complicated.
The layout of a typical microcontroller system is represented in Fig. 5. The input devices may be directly connected to the I/O pins.
Switches for example, can be wired directly to the IC as in FIG. 6.
FIG. 5 A microcontroller has the CPU and most other units of the system
on a single chip. It communicates with the external world through the I/O
pins of its one or several ports. The input and output lines radiate from
the microcontroller.
FIG. 6 A simple one-bit input to a microcontroller. The resistor holds
the pin high (logic 1), except when the switch is closed, when the input
is low (logic 0). A suitable value is 10kO. Note that +V is the processor
supply voltage.
FIG. 7 Simple one-bit control of a filament lamp by a microcontroller.
The resistor limits the current drawn from the output pin to a safe level. +V may be higher than the processor supply voltage, if required.
Other input devices, such as photocells or Hall effect magnetic detectors, need a simple circuit to interface them to the microcontroller. Similarly, the pins of typical microcontrollers are able to source a few tens of milliamps, so indicator devices such as LEDs can be driven directly from the pins. Devices that will accept logic level inputs can also be driven directly. Other output devices, such as solenoids and motors, require heavier currents and so need special interface circuits, such as a switching transistor (FIG. 7).
The '1200' is the simplest member of the AVR family of microcontrollers. Others have larger on-board memory and additional features such as a serial port, a pulse width modulator, capture/ compare circuitry and an extra timer.
Microprocessors
At one time, the Z80 was used as the CPU in several of the popular hobby computers. It still has many applications in microelectronic systems, particularly those that require more computing power than a microcontroller is able to provide. However, as the CPU of hobby computers and other desktop computers, it has been superseded by much more powerful processors, such as the Intel Pentium and the AMD Athlon.
The Z80 is contained in a 40-pin package. Its pins fall into seven main groups:
• power lines - the Z80, like most microprocessors and other devices in the system, runs on a 5 V supply.
• data inputs/outputs - there are 8 of these, allowing a byte of data to be read or written by the IC.
• address outputs - there are 16 of these, providing 64K (see box) locations in address space. More advanced versions of the Z80 such as the eZ80 have 24 address outputs.
• system clock input.
• reset input.
• control inputs - there are six of these. The inputs control the rate of processing or allow processing to be interrupted or slowed.
• control outputs - there are seven of these, used by the CPU to communicate with the rest of the system.
The internal structure and activities of the microprocessor are described in SECTION 4. Here we look at the ways in which the microprocessor communicates with the other parts of the microelectronic system.
FIG. 8 A typical microprocessor system has all its parts connected
to the data, address and control busses.
Architecture of the system
A microcontroller system usually has I/O connections radiating to the input and output devices (FIG. 5). By contrast, a microprocessor system has a single, central connector with branches going to the microprocessor and all other units in the system. This arrangement of connectors is known as a bus. The bus was first referred to in Section 1, Fig. 5, but, in the more detailed drawing of FIG. 8, it can be seen that there are actually three busses running side by side. Each bus is connected to all the units of the system. The three busses are concerned respectively with data, addresses, and control (match this statement with the list of pin types in the previous section). Note that the data bus carries signals from the CPU to other parts of the system and also carries signals to the CPU from other parts. There is two-way communication. The address bus and individual lines of the control bus communicate in only one direction.
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Continual upgrading
The reader should be aware that the microelectronics industry is forever active in producing new devices and improving the performance of the old ones. It is impossible for a guide to be really up-to-date. Specifications can and probably will change between the date this guide is written and the date that the reader gets it, even though the dates are less than a year apart.
The best way for the reader to keep up-to-date is to study the various electronic magazines and to browse the electronic sites on the Internet.
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Arrangements of pins
In the Z80, the terminal pins are arranged in two rows along either side of the ICs, as in FIG. 1, except that there are 40 pins (more in some versions). This is known as the dual-in-line (DIL) layout. CPUs that are more powerful have many more pins. This is mainly because of extra pins in the data I/O and address output groups. The extra data pins (bringing the total to 16 or 32) connect to additional circuitry on the chip. They allow the CPU to deal with much larger numbers and longer codes. The extra address output pins allow the CPU to address a much larger memory. The DIL layout is not suitable for more than about 40 pins. ICs with larger numbers of pins are usually square, with the pins arranged along all four sides in a single or double row. The most powerful CPUs, such as the Pentium and Athlon, have hundreds of pins and special layouts are used.
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The data bus and three-state outputs
If we look even more closely at a bus, we see that each bus consists of many tracks running side by side. FIG. 9 shows a data bus that is eight bits (1 byte) wide. This is typical of most microprocessors. Voltages representing logic low (0) or high (1) are placed on this bus, by the CPU or other devices in the system. They represent a number or an operational code. This is how the CPU reads data from units such as the memory, or sends data to units such as an output port.
FIG. 9 A bus consists of a number of conductors running side by side
on the circuit board. Here we illustrate a data bus that is 8 bits wide.
The figure shows the voltage levels on the data bus when the binary value
1011 1001 is present.
One essential point about a data bus is that only one unit can be allowed to place data on it at any one time. It is the same situation as a discussion group. If one person is talking, the others must keep quiet so that person can be heard by all. However, in all the units in FIG. 9 the data output pins are permanently soldered to the bus. It is inevitable, given the way in which microelectronic systems are constructed. The difficulty is that, even if the outputs of the 'quiet' units are at zero volts, they will pull the bus voltage levels down. The signal from the 'talking' unit will be 'swamped' by the 0 V levels from the 'quiet' units. The solution to this problem is for all units connected to the data bus to have three-state outputs. The three states of such an output are:
• logic 0 - the pin is at logic low voltage.
• logic 1 - the pin is at logic high voltage.
• the pin is in the high impedance state.
In the first two states the pin is electrically connected to the bus so that the output voltage (high or low) of the internal logic circuit appears on the bus. In the third state, a very high resistance is switched in, between the pin and the internal circuit. The resistance (or impedance) between the pin and the circuit is very high. In effect, the pin becomes disconnected from the internal circuit. The logical state of the internal circuit can then have no effect on the bus.
Whether the data pins of a device are in the high impedance state or not is decided by the level applied to its CHIP ENABLE (CE) input. If the chip is enabled (CE low) the outputs may be 0 or 1, that is the voltage at each output pin is either 0 V or 5 V. The device puts this data on to the bus. If the chip is disabled (CE high) the pin is in the high impedance state so it can not place data on the bus. A control signal, sent by the CPU to the CE input of the device ensures that the device puts data on the bus only when required. At other times, it is disconnected. Only one device must be enabled at any one time. When one is enabled, the others must be disabled, otherwise two or more devices will try to put signals on the bus at the same time. This is known as bus contention.
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Bus width
A typical microprocessor such as the Z80 has eight lines in its data bus. We say the bus is eight bits wide, and we number the bits from D0 (the LSB) to D7 (the MSB).
However, a bus with only 8 bits can transmit only the integer values from 0 to 255. It takes more bits to represent larger numbers or to represent quantities more precisely. The main way to allow for larger numbers and greater precision is to increase the number of bits to 16, 32 or (as in the case of the Intel Pentium and Digital Alpha) to 64.
The number of lines in the address bus limits the number of different addresses within the system.
The Z80 and many other microprocessors have an address bus that is 16 bits wide. This allows it 64K addresses, which is enough for a small system. More powerful processors have more address lines, such as the 68000 family with 24 bits, and the Pentium with 32 bits.
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The address bus and address decoding
Only the CPU puts addresses on the address bus. The other devices in the system simply wait until they are addressed before doing anything.
A device recognizes when it is being addressed (that is, when its address is on the address bus) by means of a decoder circuit. This is a logic circuit that produces a low (usually) output when, and only when, its own address is on the bus. FIG. 10 illustrates the principle of address decoding with a practical circuit. The circuit is practical in the sense that it uses obtainable types of logic gate. An address consists of a set of 0's and 1's (lows and highs). The decoder must respond only when:
• all the address lines that are supposed to be high are high, and
• all the address lines that are supposed to be low are low.
In FIG. 10 the highs are taken care of by the 13-input NAND gate (the 74133). For the address in the example, the address lines that are supposed to be high are connected to this gate. There are four spare inputs and these are wired to the positive supply line. When all inputs to the gate are high, its output goes low. We require a high output to send to the final gate (the 7410) and we use an INVERT gate to produce this. The 7400 family has no NOR gates with a large number of inputs so we use two 4-input NOR gates. The 7425 has two such gates on a single chip. The two gates handle the seven low lines in the target address. The eighth input is held low by connecting it to the 0 V supply line.
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Memory size
Every location in the memory of a computer must be identified by its own unique address. The number of different addresses that are possible in a given system depends on the number of bits it its addresses. For example, many microprocessors use 16-bit addresses. The addresses run from 0000000000000000 (zero decimal) to 1111111111111111 (65535 in decimal), giving a total of 65536 possible addresses. With such large numbers, we usually quote them in 'K'. Really, K stands for 'kilo' which means 'thousand' but in quoting addresses and sizes of memories it means 'times 1024'. In the example, 65536 is quoted as 64K.
Here are some sizes of whole memories or of individual memory chips:
The bottom line of the table explains why the numbers of addresses shoot up so rapidly. Do not try to remember these figures. Just remember the bottom line and you can always work out the rest on a calculator, if you ever need them.
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When the target address is on the bus, all three inputs to the 7410 go high. Its output goes low. This pin is wired to the CHIP ENABLE input of the device that is being addressed. This causes that one addressed device to become active.
There is more about addressing in SECTION 3.
FIG. 10 It takes several logic gates to decode a single address.
The diagram shows the logic levels present in the decoder when (and only when) the target binary address 0010 1110 0110 1011 (2D6C in hexadecimal) is present on the 16-bit address bus. The 1k-O resistor reduces flow of current to the unused inputs of the 74133 and so reduces the risk of damage from voltage spikes on the positive supply line.
The control bus
The control bus consists of an assortment of lines with various functions. Some of them carry signals from the CPU to other devices. Some carry signals from other devices to the CPU. They may run side by side for part of their length, but their routing depends mainly on their function.
The composition of the control bus depends on the needs of the microprocessor. The Z80 control bus comprises these six input lines:
All of these inputs except CLK are active low. Their symbols should have lines drawn above them to indicate this, but they were omitted from the table for clarity. In this table, the term 'devices' includes memory, I/O and various peripheral devices.
An example of the use of the BUSAK input is in direct memory access (DMA). Some systems include an IC known as a DMA controller. It is used when a large block of data (such as a word-processing file or a program) has to be transferred to memory from storage on a disk.
Transfer in the normal way, in which the CPU requests each byte, reads it and then writes it to RAM, would take far too long. Instead the DMA controller requests the CPU to give up control of the address and data busses while it transfers the data directly from the disk to memory.
In this CPU, there are only two levels of interrupt, but other micro processors may have more. A low input to NMI can not be ignored by the CPU unless a BUSRQ signal has been received. On receiving an NMI signal, the CPU completes the instruction it is working on and then jumps to the address of the interrupt request routine (IRQ). The INT0 signal is the one normally used for requesting interrupts. This can be ignored if the interrupt flag in the status register has not been set. This allows the programmer to disable interrupts when the CPU is engaged in a complicated routine that might crash if interrupted. The I flag can be set after the routine is complete to enable interrupts again.
The seven output pins of the Z80 control bus are all 3-state outputs:
All of these outputs are active low. Their symbols should have a line drawn above them to indicate this, but they were omitted from the table for clarity.
When the Z80 is about to read or write to memory it makes the MRQ line low. This is the equivalent of a CHIP ENABLE signal to the memory chip. At the same time, it makes the RD or WR lines low, depending on whether it wants to read or write data. Similarly, when it wants to read or write to a port it makes the IORQ line low, and makes the RD or WR low at the same time.
The Z80 has separate lines for enabling reading or writing. Some other CPUs, such as the 6205, use a single line, symbol R/W. A memory IC interprets this as a read operation when it is high and a write operation when it is low.
On studying the two tables above, it can be seen that the majority of the control lines are used for handshaking between the CPU and other devices. In other words, the control lines are the means by which the actions of the CPU and of the other devices are co-ordinated.
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Other processors -- the 6502
Discussion of microprocessors in this SECTION is centered mainly on the Zilog Z80, but there are many other processors in use. They have individual features, which may make them better suited for certain applications.
The Synertek 6502 is a relatively early processor that has been very successful in the past and is still in use today.
Its architecture has the basic features (internal busses, status register, stack register, program counter, address and data buffers, ALU) that are in the Z80. It differs in having only an accumulator and no general purpose registers. This means that all processing centers on the accumulator and ALU, a difference that shows in the types of instructions in its instruction set.
Like the Z80, it has an 8-bit bi-directional data bus and a 16-bit address bus. It has two interrupt inputs, NMI and IRQ, which function in a similar way to those in the Z80.
The 6502 has a wide range of addressing modes, some of which help to make programming simpler. One of these is zero page addressing, which assumes that the first (high) byte of an address is $00. Instead of quoting the full address, such as $005A, the programmer quotes only $5A. This shorter form saves program storage space and runs faster. The 6502 makes use of its two index registers, X and Y for addressing. In indexed zero page addressing, an address in zero page is given relative to a value stored in the X or Y register. For example if the X register holds $24 and the address is given as $57, the actual address is found by adding these together to give $007B. This feature has the advantage that the registers can have different values put into them as the program runs. If the program runs in a loop, X can be changed each time round the loop so that different addresses are accessed each time. In particular, X and Y can be incremented or decremented so the program can scan a table of data stored in consecutive bytes in zero page. Indexed addressing is not restricted to zero page. Other modes of addressing apply it to addresses in the whole memory space.
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System clock
The clock is a squarewave generator capable of running at high frequency. Some microprocessors (such as the 8085) and practically all microcontrollers include the clock circuitry on the chip so all that is necessary is to attach a crystal having the required frequency. If a completely separate clock is required, this can be obtained as an IC, such as the 6872. With a suitable crystal, this can operate at frequencies up to 10 MHz.
Another source of clock pulses is a crystal oscillator module, which includes the crystal and logic circuitry required to give a TTL output.
These can be obtained to run at frequencies up to 50 MHz, with suitable short rise-time and fall-time. In many systems, a frequency of 1MHz is fast enough, in which case it is feasible to assemble a clock based on standard logic gates (FIG. 11).
In PCs and other computing systems, processors are clocked to operate very rapidly so as to process as much data as possible in a given time.
This becomes very important when computers are running graphics and multimedia programs. It is also important when clocking telecommunications systems, so that data may be transferred as rapidly as possible. Clock frequencies of several hundred megahertz are common and frequencies of 1 GHz or more are attainable.
The frequency quoted for a CPU is usually the maximum frequency at which it can reliably be run. It can be run at frequencies less than the maximum because the clock pulses co-ordinate all parts of the system to operate as one.
The system clock must not be confused with the real-time clock, which is described in SECTION 4.
FIG. 11 A system clock built from two CMOS INVERT gates. The gate on
the right is a buffer to avoid over-loading the oscillator and so alter
its frequency. This clock has a 1 MHz quartz crystal but crystals of other
frequencies can be used.
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Other processors -- the 8086 family
When we say that the Intel 8086 is a 16-bit processor, we mean that its data bus is 16 bits wide. Instead of fetching data a byte at a time like the Z80, 6502 and many other processors do, it fetches a double byte or word. This gives it a big increase in speed of operation. Another innovation that increases speed is the prefetch buffer in which instructions are queued, ready for execution. The address bus is 20 bits wide, so the 8086 addresses up to 1 Mb of memory. To increase the width of the buses while still keeping the processor in the standard 40-pin package as used by the Z80 and 6502, some of the pins have been multiplexed. They perform different functions at different stages of the operating cycle. Fifteen pins (AD0 to AD14) are used both for the data bus and for the lower fifteen lines of the address bus. An example of this kind of multiplexing appears in SECTION 8. The four upper pins (A16 to A19) of the address bus are multiplexed as status output pins. One of the control pins is the MN/MX, which selects between two modes of operation. When this is high, the processor is in min mode; it operates much like the earlier 8085 processor. When the pin is low, it operates in max mode; it is able to work in conjunction with other processing ICs such as a maths coprocessor, which is specially designed to take over the more complex mathematical operations of the processor. This gives an advantage of speed when running programs in which mathematical operations predominate.
The 80286 (known as the '286') was the successor to the 8086 in a 68-pin package with a 24-bit address bus and a 16-bit data bus. It can access up to 16K of memory. This featured a number of improvements and was succeeded by the '386', the '486' and the Pentium processors. The '386' is a true 32-bit processor, with all its registers 32 bits wide. It can access 4 Gb of memory. Some versions of the '486' included the maths coprocessor on the same chip.
The Pentium includes this as a regular feature. At every stage in development from '286' to Pentium there have been improvements in performance. There have been increases in the number of transistors (now over a million), the number of pins, the number of instructions in the set, and the maximum clocking rate.
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EXERCISE 1: Other processors
This SECTION describes some of the features of the '1200', the PICs, the Z80, the 6502 and the 8086 family. Select one or two other popular processors from the same or different families and briefly study the manufacturer's data sheets. Write a short account of the main features of each processor and describe their advantages or usefulness.
EXERCISE 2: Address decoding
An imaginary microprocessor has an 8-bit address bus.
Design a decoder that responds when the binary address on the bus is 1100 0101. Build the decoder on a breadboard, using CMOS or TTL ICs, and test its action.
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Logic families
There are three main logic families:
• Transistor-transistor logic (TTL).
• Complementary MOSFET logic (CMOS).
• Emitter coupled logic (ECL).
Each of these families has its own versions of the standard logic gates, such as NAND and NOR. Each family includes a range of ICs with more complex functions such as flip-flops, adders, and counters. The families differ in the way the basic gates are built, and this gives rise to family differences in operating conditions and performance.
FIG. 12 shows the logic levels used by TTL and CMOS families.
The main features of each family are as follows:
TTL: Based on bipolar transistors. Operates on 5 V DC, which must be regulated to within ±0.25 V. The original 74XX series (all type numbers begin with '74') is almost completely replaced by newer series with improved performance. One of the most popular is the 74LSXX series, which has a lower power requirement of about 2 mW per gate. It has faster operation than standard TTL, the typical propagation time per gate being 9 ns. It operates with clock speeds up to 40 MHz. Some of the newer series operate on 3.3 V, making them suitable for battery-powered equipment. TTL is widely used in microelectronic systems.
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Bit slicing techniques
While most systems are based on processors with a data bus width of 8 bits or more, another approach uses 4-bit controllers. Such a system may have 2, 4, or more controllers working in parallel. To process a 16-bit value, for example, the data bits may be divided into four 'slices', each four bits wide. The slices are processed simultaneously and the results combined into a 16-bit word. The advantage of this technique is that the 4-bit processors are faster than larger processors and, working together at the same time, produce the result much more quickly.
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FIG. 12 Voltage levels for TTL and CMOS are specified as shown in these
diagrams. For example, with a 5 V supply a CMOS gate interprets an input
below 1.5 V as a logic low input. An input above 3.5 V is taken to be a
logic high input. A low output is always between 0V and 0.05 V, and a high
output is between 4.95 V and 5 V.
In either case there is a 1.45 V margin for error. A 'noise' spike on an output signal can be as much as 1.45 V without affecting its apparent logical value. This means that CMOS has good noise immunity.
CMOS: Based on MOSFETs, and therefore have very low power requirements, typically 0.6 mW per gate. Operating voltage is in the range 3 V to 15 V (absolute maximum = 18 V), which makes it ideal for battery-powered equipment. With FET inputs, the gates require so little input current that the output from a gate can be fanned out to 50 or more gates. The most popular series is the 4000B series. Its main limitation is speed: its propagation time is in the region of 125 ns and the maximum clock rate is 5 MHz. This may not matter in many microelectronic applications. Several of the 74XX series are available in CMOS versions, known as the 74HCXX and 74HCTXX series. Logic 0 and logic 1 voltage levels are widely separated (see FIG. 12) making the series highly immune to noise. Because of the small size of CMOS gates, it is possible to fabricate complicated logic circuits on the chip. The series includes many complex devices, such as the 4020 14-stage counter, which are not available in the 74XX series.
ECL: This is specially designed for high-speed operation. The transistors are never driven into saturation so they quickly change state when logic inputs change. In addition, the circuits have low input impedances to avoid the speed-reducing effects of capacitance. This increases power requirements to around 30 mW per gate. Propagation time is about 1ns per gate and the maximum clock rate is in the region of 500 MHz. Because the transistors are operated in the non-saturated state, logic levels have to be carefully controlled at -0.8 V and -1.6 V respectively.
The small difference between these levels means that ECL is much more affected than the other families by noise spikes on the lines. Specially filtered power supplies are essential. Because of the high frequency of the signals, tracks on the circuit board have to be much more carefully laid out. In summary, ECL is difficult to use and is restricted to computer circuits where very high speed is the prime factor.
Problems on the CPU
1 Describe the main features of a named microcontroller (details of internal structure not required).
2. Explain the difference between parallel and serial transfer of data. What are the advantages and disadvantages of each?
3. Describe the main features of a named microprocessor (details of internal structure are not required).
4. Name the three buses of a microprocessor system. Outline their features and functions, giving examples.
5. What are three-state outputs and why are they essential on the data bus? Why are they not needed on the address bus?
6. Explain, giving an example, what is meant by address decoding.
7. Describe the signals present on the control bus when a Z80 (or other named microprocessor) is writing data into memory.
8. What is a system clock and why is it an essential unit in a microelectronic system?
9. Explain what bit, nybble, byte and word mean.
10. What is meant by bus contention and how may it be avoided?
Multiple choice questions
1. When it is essential for a Z80 to be interrupted, a low signal is put on:
A the data bus.
B the NMI line.
C the control bus.
D the INT0 line.
2. Signals can be sent in either direction on:
A the address bus.
B the BUSACK line.
C the WAIT line.
D the data bus.
3. Three-state outputs are used:
A for putting addresses on the address bus.
B to send interrupts.
C for reading data from the data bus.
D to isolate internal circuits from the data bus.
4. A system has an address bus that is 14 bits wide. The most significant bit is also known as:
A A14.
B A0.
C A13.
D A1.
5. An example of an integer is:
A -24.
B p.
C 3.76
D 38½.
6. One of the logic families most suited for high speed operation is:
A ECL.
B TTL C 74LS00
D CMOS.
7. A logic family most suited for battery-powered equipment is:
A TTL
B ECL
C CMOS
D 74LS00
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