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The advantageous feature of digital circuits are described. Discussion of noise, including EMI, leads on to choosing a suitable logic family for building a project. Connections within families and between families are considered. The design of the circuit board is discussed, together with precautions that may be taken to ensure correct operation. Breadboarding techniques are outlined.
Digital systems
A digital system in general has fewer problems than an analogue system. One reason is that a digital system operates on binary data.
Voltages are either high (if they exceed a certain minimum 'high' value) or they are low (if they are less than a certain maximum 'low' value). There is usually no difficulty in outputting voltages that are comfortably within the specified high or low ranges, and there is no difficulty in inputting these voltages and having them correctly interpreted.
The second advantageous feature of digital circuits is that most of them are driven by a system clock. We make sure that voltages have had time to settle and then the changing clock edge triggers off the next state of the system. Both voltage levels and time are accurately managed, so eliminating many of the uncertainties prevalent in analogue circuits.
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Noise
Any unwanted electrical signals present in a circuit are referred to as noise. If the amplitude of the noise is great enough, it degrades the wanted signals. In logic circuits, it may cause a logic low level to be read as a logic high level or the other way about, so that data is corrupted. It may have a similar effect on control signals causing a device to reset, for example, or to latch its input at the wrong time.
Similar effects can result from noise on the supply lines.
It is usually possible to minimize noise to an acceptable level but impossible to remove it altogether. Noise may be generated in the circuit itself, especially in resistances and semiconductors. It may be picked up from other parts of the same circuit, especially where tracks on the circuit board run side-by-side (crosstalk). It may also be picked up from outside as electromagnetic interference (EMI).
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For the reasons stated above, minor variations in power supply, ambient temperature, and component values have little effect, if any, on the operations of a digital circuit. For the same reasons, noise in the form of voltage spikes is largely ignored by digital circuits. This is why digital circuits have become so widely used, even for applications such as audio recording and playback in which the original input and final output are necessarily analogue.
In spite of the essential robustness of digital circuits, there can be problems with these too. The problems are more severe when we try to push the circuits to the limits of their capabilities, particularly as we increase processing speeds to their maximum. In this SECTION, we look at some of the problems that may arise with digital circuits in microelectronic systems and how we may try to overcome them.
Many of the problems arise because of two related reasons:
• The signals in microelectronic systems are mostly of radio frequency.
• The signals being of high frequency, their rise times and fall times are extremely short. Putting this the other way round, there are high rates of change of voltage and current.
A third source of difficulty is electromagnetic interference (EMI).
As a result of one of these factors, a logic gate may become set to the wrong state and the system will fail.
Noise immunity
Fig. 12 shows the input and output levels of LSTTL and CMOS gates. The voltage at a gate producing a high output is at least 2.7 V. A gate receiving that output will accept it as a high input if it is at least 2.0 V. This means that the gate will still give the correct result if there is a spike of, say -0.5 V on the output signal, taking it down to 2.2 V.
It still could just work if the spike is -0.7 V, but might fail occasionally. These values show that the noise immunity of LSTTL is 0.7 V for logic high. For logic low the corresponding voltages are 0.5 V and 0.8V, giving a noise immunity of 0.3 V. Spikes as high as this may occur quite often in a badly designed circuit.
The noise immunity of CMOS operating at the same voltage (5 V) is 1.45 V at both high and low logic levels. This is better than LSTTL.
Increasing the supply voltage to 15 V increases the noise immunity still further, to 3.95 V at high and low levels. For a system working in a noisy environment, it may pay to use CMOS operating at 15 V.
As mentioned in SECTION 2, the noise immunity of ECL is less than that of TTL or CMOS, making system design with this family a difficult task.
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Electromagnetic interference
Any flow of electric current generates electromagnetic radiation (radio waves), the larger the current the stronger the radiation. When this radiation passes through a piece of electronic equipment it generates voltages in the signal lines and in the power lines. These may cause the circuit to operate incorrectly. EMI may pass directly as radiation or may be transmitted along the mains power lines.
There are many sources of EMI, one of the worst being switching currents on or off. The switching of the clock in a microelectronic system generates high frequency radio waves which may interfere with the operation of the system itself or of a neighboring system. The switching of signals in the data and address busses has the same effect.
EMI can also arise from outside sources such as domestic equipment (switching the motors of refrigerators, washing machines), in industrial plant, and in the ignition systems of motor vehicles. In these examples the loads are inductive so a high voltage is built up as the switch contacts open. This causes arcing at the contacts, which is a powerful source of EMI.
Another source of EMI is the electric mains, where the 50 Hz (or 60 Hz in USA) may appear as ripple on the power lines of a microelectronic system. This can be eliminated with good shielding and a properly designed power supply.
Natural sources of EMI include thunderstorms and the effects of cosmic radiation from outer space.
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Logic and clock rate selection
One of the first decisions to be made, after deciding on the processor (SECTION 4), is what IC family is to be the main one used. The choice is between:
• 74LSXX series (low power Schottky TTL). A wide range of ICs available, but must have a regulated 5 V supply. The original 74XX series is now available only in a restricted range of types.
There are other TTL sub-families for special applications.
• CMOS 4000 series. A wide range of ICs is available, including many complex ones. It operates on 3 V to 15 V supply. It has a large fanout and good noise immunity. CMOS is slower than TTL but fast enough for most applications.
• CMOS versions of TTL series, the 74HCXX and 74HCTXX sub-families. They have greater noise immunity than regular TTL.
• ECL is fast but has low noise immunity, and circuits are troublesome to design.
Another choice to be made is the speed of the system clock. A safe general rule is to make the clock as slow as possible. In addition, use the slowest family that will do the job. Usually this means settling on the CMOS 4000 series. The reason for keeping the system speed as low as possible is that this minimizes EMI emission, which may affect the operation of nearby circuits and perhaps other sections of the same circuit. Conversely, low speed often makes the system less susceptible to noise from adjacent circuits and other sources of EMI.
Sometimes the choice of family is determined by what functions are available. For example, if long counter chains are needed, the 4000 series is the best. For octal buffers and latches, the 74LSXX series has more types to offer (SECTION 5). On occasions, it happens that the two functions required are not both available in the same family. In such cases, it is necessary to use an interface between them. The supply voltage must be compatible with both families, which usually means operating at 5 V.
When connecting gates and other logic inputs and outputs, remember that there is a limit to the amount of current that an output can provide in the logic high state. There is also a limit (usually larger) in the amount of current a gate output can sink is the low logic state. There are also limits on the amounts of current to be sourced or sunk to make an input register as low or high. The result is that there are definite numbers of gates that can be reliably driven by the output from a given type of gate. This number is known as the fanout. The table below shows the fanout of various combinations of families.
* a virtually unlimited number of gates.
It can be seen that, except for a CMOS4000 output driving a 74LSXX input, fanouts are sufficiently great for most designs. A problem arises with certain microprocessors that have low fanout. Buffer ICs may be needed to prevent the bus from being overloaded.
In the case of TTL gates (which includes gates of the 74LSXX series) the minimum output voltage (2.7 V) that counts as logic 1 is less than the minimum logic 1 input voltage (3.5 V) to a CMOS gate (or 74HCXX gate) running on the same +5 V supply. This is shown in Figure 2.12. A high output sent from a TTL output to a CMOS (or 74HCXX) input may fail to be recognized as high. Because of this, any connection between a TTL output and a CMOS (or 74HCXX) input needs a pull-up resistor of 2.2 k-O, wired to the supply line.
Alternatively, substitute a 74HCTXX device for the CMOS device as the input and output voltages of the HCT series are compatible with TTL.
Many chips, including RAMs and some CPUs, are made using NMOS technology. NMOS is compatible with CMOS, so what has been said about fanout of CMOS also applies to NMOS.
When a gate changes state, it produces a change in the amount of current drawn by the gate and by any unit being driven by it. The result is a sudden change in voltage on the power lines. In other words, there is noise. The situation is worse with synchronized logic in which many gates change state at the same time. Conversely, devices such as flip-flops and counters are particularly sensitive to noise. Noise may cause them to change state or mis-count.
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Track resistance
The resistance of a typical circuit board track is 4 m-O per cm. If a section of track is 10 cm long its resistance is 40 mO. If one end is connected to the 0 V terminal of the power supply and a current of 100 mA is applied at the other, the voltage difference between the track ends is 100 mA × 40 mO = 4 mV. This may not be enough to affect the operation of a logic gate powered from the track, but the voltage spike will be greater and more effective if:
• the current is greater.
• the track is longer.
• the track is narrower.
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Noise on the 0V (ground) line in minimized if the line has low impedance. Any suddenly increased current flowing into the line is immediately carried away to the 0 V terminal of the power supply. To reduce this noise we can:
• Make power tracks wider, particularly the 0 V track. If possible, widen the 0V track into a ground plane, occupying all vacant areas of the board .
• Make power tracks as short as possible. This advice applies to tracks of all kinds for, the shorter the track, the less likely it is to pick up EMI, and the less likely it is to emit EMI. This is particularly necessary when designing the system clock, a potent source of noise and at the same time easily affected by noise.
• Decouple the supply. This consists of placing capacitors (for example, 100 nF multilayer or disk capacitors) across the supply lines, close to the IC which is to be decoupled. The distance between the capacitor and the terminal pins must be kept as short as possible and so must the leads of the capacitor. Otherwise the inductance of the track and leads in combination with the capacitor produces a resonant circuit. This will cause 'ringing' whenever there it a change of logic level, with unpredictable results. For the very fastest logic, there are IC sockets which include the capacitor directly under the IC. For simpler, slower, circuits there is less problem with decoupling. A few 100 nF capacitors should be scattered around the board, one capacitor to every 5 or 6 ICs. It is also a good idea to decouple the supply with a larger capacitor (say a 47µF electrolytic) where the supply lines enter the board.
Crosstalk
Another major problem is crosstalk, which is the picking up of a signal by an adjacent track. This is particularly serious in digital circuits because the signals have rapid rise and fall times. Changes in level are equivalent to a very high frequency signal. Where two tracks lie side-by side for a few centimeters there is capacitance between them. At very high frequency the impedance of a capacitor is reduced to a minimum.
Signals pass freely across from one track to the next.
To avoid this effect we can:
• increase track spacing.
• keep parallel runs of tracks as short as possible.
• avoid running signal tracks parallel to power line tracks (large voltage fluctuations on power lines could swamp the signals).
• keep tracks carrying input signals away from tracks carrying output signals. This applies to the board as a whole (keep input circuits away from output circuits) and to individual ICs (keep tracks leading to input pins away from tracks leading from output pins).
Transmission lines
When very high frequency signals are used in a microelectronic system the wavelength of the signals may be comparable to the lengths of some of the tracks. Then the normal rules of conduction no longer apply.
Instead the tracks must be treated as transmission lines. A transmission line has a characteristic impedance depending on its dimensions and other factors. If the output impedance of a signal source and the input impedance of the receiver both match the characteristic impedance of the line, the signal is transmitted along the line with virtually no loss. If they do not match, the signal may not reach the far end, or may be received with much reduced power. A portion of it may be reflected back from the receiving end causing standing waves in the line and also resulting in ringing and other effects. These make the operation of the computer very erratic. The design of systems involving transmission lines is outside the scope of this guide.
Design points
Here are a number of design points which will improve the performance of a microelectronic system:
Unused inputs: It may often happen that one or more inputs to a gate or logic device are left unused. Sometimes a chip contains more gates than are required, so there are whole gates unused. There are rules about what to do with unused gate inputs, and other unused inputs such as resets, presets, and chip enable inputs. The rule is simple with CMOS. All inputs must be connected to the positive supply line, the negative supply line or the output of another gate. You must always do this, even when you are breadboarding an experimental circuit and are using only one gate out of the four on the chip. If the inputs of the other three are left unconnected, the gate you are using may not behave correctly and may take a large amount of current. A rule related to this is that all connections to the power line must be made before the power is switched on. Conversely, the power supply must be switched off before any alterations are made to the circuit.
With TTL, inputs of gates or other circuits that are left unconnected act as if they have a logic high input. However, if a gate that is being used has spare inputs, it is better not to leave these unconnected.
Unconnected inputs reduce noise immunity. Instead, connect unused inputs to:
• the positive supply, through a 1 k-O resistor.
• the 0 V line (no resistor required).
• one of the used other inputs of the same gate.
Fig. 2 shows two examples of this technique.
De-bouncing inputs: When a switch or key closes, the unevenness of the contact surfaces (on a microscopic scale) cause it to close and open again several times before it eventually closes permanently. We say that there is contact bounce. The rapid succession of on-off states is not noticeable when, for example, we switch on a lamp or a motor. But a logic gate responds so rapidly to changes in input that it detects every closure and opening. If, for example, a key is intended to send one pulse to a counter circuit every time it is pressed, the counter may register five or more 'presses' each time it is pressed once.
There are times when contact bounce does not matter. For instance, when we reset a flip-flop, it is reset on the first contact and repeating the action half-a-dozen times has no further effect. When contact bounce does matter we use special circuits to debounce the switch. In FIG. 1 the capacitor slows down the rate of change of logic level so that the noise from the switch is absorbed. This technique is effective but may make the action of the switch too slow. If a large-value capacitor is used to thoroughly debounce the switch, it takes longer to charge and discharge. Switching on and off can not be repeated as rapidly as required. In this case the logic of FIG. 2 is be used. The set-reset flip-flop is made to change state by bringing one or the other of its inputs low. The change over occurs the first time the switch makes contact and the flip-flop does not change state again during the subsequent bounces.
FIG. 1 This debouncing circuit gives a low output when the push-button
is pressed. This is a suitable output for triggering an active-low input.
FIG. 2 The absence of capacitors in this debouncing circuit mean that
it responds instantly to a change in the position of the switch.
In SECTION 12 we discuss how to debounce a switch by using software instead of hardware.
Watchdog timer: In spite of all the precautions, it may still happen that a bit in memory or in one of the registers of the CPU may become altered by electromagnetic means. Substituting a 0 for a 1 or 1 for a 0 can provide the CPU with false data or, worse still, may make it jump from its present place in the program to some unpredictable place in another part of RAM, where there may be no program. The result may be errors in output or the program may crash completely.
The watchdog timer is a technique for avoiding such dangers. It keeps a watch on the CPU, making sure that it is operating correctly. The timer can be an ordinary electronic timer circuit, such as one based on the popular 555 or 7555 timer IC. Or it can be a timer built in to the processor. Some I/O ICs also have one or more timers included.
The principle of the technique is very similar to the routine followed by a night watchman, who has to report to a supervisor or automatic security system at frequent intervals while on his rounds. If he fails to check in at the expected time, it indicates that something is wrong and action is taken. Similarly, the CPU is programmed to trigger the timer at frequent intervals, perhaps every millisecond. The period of the timer is a little longer than the interval at which it is triggered. When the timer has been triggered, its output goes high and it should be triggered again before the period is over. The output of the timer is connected to the reset input of the processor and, as long as the timer holds this high, the processor runs normally. If a fault develops and the CPU is no longer following the program correctly, it no longer triggers the timer. After a millisecond or so, the timer output falls to logic low.
This automatically resets the CPU, which jumps back to the beginning of the program and starts again.
Breadboards
Most if not all of the microelectronic systems you build, program and test in your practical classes will be assembled on a breadboard. From what has been said about the problems of digital circuits, it might be wondered if you will ever get your breadboarded circuits to work.
There is not much need to worry. The systems you will build have a clock of relatively low frequency so that there is little EMI. The slow action also gives the circuits time to respond and settle. Connecting wires are short (always use wires as short as possible on the breadboard). Also your systems are small, rarely consisting of more than three or so ICs.
One of the more serious problems with using a breadboard for microelectronics systems is the large number of connecting wires that is sometimes required. The situation is worse if the circuit includes busses. Inserting the wires systematically is easy, but problems arise if the circuit fails to work correctly. It then becomes difficult to follow the connections among a cluster of wires. Worse, if a few of the wires accidentally come out of their sockets, it is sometimes difficult to know where to replace them without carefully checking through the whole system. If this seems likely to happen in your project, it is worth considering building at least part of the circuit on a rectangle of stripboard. Mount all ICs in sockets, so that they may easily be removed for testing the connections.
Questions on planning the system
1. What is meant by noise in electronic systems? How can it be reduced?
2. What is noise immunity? Explain why CMOS has good noise immunity.
3. Discuss the points that have to be considered when deciding on what logic IC family to use in a microelectronics project.
4. Explain, with examples, the meaning of the term fanout.
5. What is crosstalk and how may it be avoided?
6. What is meant by contact bounce? Describe two circuits which reduce or eliminate it.
7. Describe the function of a watchdog timer.
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