AN INTRODUCTION TO DIGITAL IC's

Digital ICs, which have been used by computer engineers for many years, are now available to experimenters at home and in schools. Besides having obvious uses in electronic timers, counters, digital voltmeters and other instruments, they are now to be found in a wide range of equipment including model control and fascinating toys and games.

This guide iis mainly concerned with Transistor-Transistor-Logic (TTL) such as the 7400 series. The range is wide and covers many different types of device. It is also cheap, and readily interfaces with other IC series. Various circuit configurations are available which may be directly interconnected to create a single complex system.

FIG. 1-1. DIL PIN IDENTIFICATION

The ICs come in two packaging styles, dual-in-line and flat- pack. The first type is the one generally available and discussed here. The number of pins or contacts depend on the complexity of the device. Simple devices have 14 pins (7 per side), others have 16 pins (8 per side), and a few have 24 pins (12 per side). Pin spacing is 0.1 inches between centers so that the IC readily fits 0.1 inch matrix Veroboard.

As seen in Figure 1-1, pin number 1 is identified by a nitch or small indentation in the top of the moulding. The numbering then runs down one side and back up the other, with the highest pin number always opposite to number 1.

Power supplies for digital ICs are fairly critical. The devices are easily damaged by excessive signal or supply potentials which, unless otherwise stated, must not be allowed to exceed a nominal 5 volts (5.2V max). On the other hand, for reliable operation the supply should not fall below 4.5 volts. When several devices are operating at different frequencies, as in a dividing or counting chain, say, excessive noise or ripple on the supply rail may cause circuit malfunction. It will be realised, therefore, that a precise and well regulated power supply is very desirable. It is also advisable to decouple every five to ten packages with a capacitor having a value in the order of 0.01 to 0.1 microfarads. * Digital circuits employ binary signals having two possible logic states:- Logic "hi" (high) 4 volts ± IV Logic "lo" (low) zero to about 0.5 volts.

When discussing positive logic, " 1" is the same as "hi" , and "0" is the same as "lo". Negative logic reverses this convention but is rarely used. It is important for the transition time between the two logic states to be very short. This can cause problems when connecting TTL to non-TTL circuits and switches, but is usually overcome by using the Schmitt-trigger or anti-bounce circuits described later in the book.

Truth Tables are a method of showing the relationship between signal states at different parts of a circuit, or at different times; e.g. between the input or output, or before and after the clock-pulse. The practical examples shown in this book will assist the reader in using and testing the devices concerned.

Fan-Out is the maximum number of unit loads which can be connected across the output of a circuit. Usually every TTL input represents one unit load, although some devices have a higher rating. Sometimes it is required to connect several inputs of a multi-input gate together when the value of the common input will equal the sum of the unit values; e.g. two one-unit inputs connected in parallel represent a load of two units.

Unused inputs can generally be dealt with as follows:

1. Connect them to the 5 volt power supply via a 1,000 ohm resistor. Several inputs may be connected to the same resistor.

2. Connect the unused input in parallel with a used input on the same gate, provided that the maximum fan-out of the preceding circuit is not exceeded.

3. Leave the inputs floating (unconnected), when they may be regarded as being "hi". Under certain conditions this may cause the circuit to malfunction.

The inputs of completely unconnected gates may be taken to ground for minimum power dissipation, or left floating unconnected.

As already stated, digital ICs are easily damaged by excessive voltage. High voltages can sometimes occur accidentally from electrical equipment such as test instruments and soldering irons. If possible the cases and metal work of instruments and electrical tools should be earthed or made completely non- conductive. Soldering irons having a ceramic body are suitable.

Inductors such as relay coils can also produce high peak voltages and should normally be shunted by a suitable diode or capacitor. High voltage transients frequently occur at the terminals of signal generators and oscilloscopes, and some ohmmeters employ fairly large potentials which appear across the input terminals. Suitable protection circuits for TTL are discussed in Section 4.

Fig. 1-2

Fig. 1-3

The high circuit density and small packaging of digital ICs make it necessary for the inexperienced experimenter to acquire new skills. The techniques used by the writer are illustrated in Figures 1-2 and 1-3. The devices are mounted directly onto circuit boards or via special holders. Copper stripped Veroboard having a 0.1 inch matrix is ideal for prototype and "one-off' construction, although it is necessary to interrupt the strips at appropriate points to prevent unwanted connections. This is achieved by using a countersink drill or specially designed spot face cutter obtained from Veroboard stockists. Wire links are used for cross connections.

Single strand insulated instrument wire may be used. The writer obtained a good supply by stripping down a length of multicore cable. Good joints are made by firmly hooking the wires around the pins before soldering. It is a good idea to carefully examine each joint area through a magnifying glass to ensure that neither pins or copper strips have been inadvertently bridged by solder or wire particles.

The neatest arrangement is to mount all the components on the insulated side of the board, and complete the wiring on the stripped side. It should be remembered that the IC pin numbering seen below the device is a mirror image of that usually shown in diagrams and data sheets. This problem can be avoided by using vero-pins to bring the connections up to the insulated side of the board so that wiring and components share the same face, when the data-sheet viewpoint is obtained.

The six digital ICs now to be described are employed throughout this book in various projects. It should be noted, however, that they represent a very small sample of the types currently available, and for which data sheets are usually obtainable from the suppliers.

The Quad 2-Input NAND Gate type SN7400 shown in Figure 1-4 contains four independent gate circuits. It will be seen from the truth table that both inputs must be "hi" for the output to be "lo" . The output is "hi" for all other input combinations. NAND gates can be wired as inverters, multivibrators, anti-bounce switches and Schmitt-triggers, as well as in the usual gate mode.

TRUTH TABLE EACH GATE IN

IN OUT hi hi lo lo hi hi hi lo hi lo lo hi

Fan-out = 10 each output

FIG. 1-4 . SN7400 QUAD 2-INPUT NAND GATES

The Dual 4-Input Schmitt-Triggered NAND Gate type SN7413 shown in Figure 1-5 contains two independent circuits.

+5 V In In In In Out

TRUTH TABLE EACH SCHMITT GATE

Positive threshold 1-7 typical Negative threshold 1-1 typical

Hystersis 0-8 V typical

Fan-out = 10 each output

FIG. 1-5. SN7413 DUAL SCHMITT TRIGGERED NAND GATE

Logically each circuit functions as a 4-Input NAND gate so that all inputs must be "hi" for the output to be "lo". All other input combinations make the output "hi" . The device has the special characteristic of producing a very good rectangular output pulse irrespective of the input waveshape, thus making it a useful input stage to TTL or other logic families which require good clean pulses with short transition time for stable operation. The significant parameter here is the hysteresis or potential difference between the positive and negative threshold values. The output will undergo an almost instantaneous transition from one logic state to the other for an input potential change of the order of 0.7 volts.

The Dual J-K Master-Slave Flip-Flop type SN7476 (Figure 1-6) contains two independent circuits, each behaving as follows:

1. Output Q is always opposite to output Q. When Q is "hi", Q is "lo".

2. If clock pulses are applied and all other inputs are "hi" or disconnected, the circuit will function as a divide-by- two counter. Output Q will go from "lo" to "hi" or "hi" to "lo" at the moment when the clock pulse goes from "hi" to "lo" (negative going pulse edge-operated).

3. Except when clock pulses are applied, inputs J and K will not affect Q.

4. When J is "lo" , once the clock pulse has driven Q "lo" it will remain there irrespective of further clock pulses until J goes "hi".

5. When K is "lo" , once the clock pulse has driven Q "hi" it will remain there irrespective of further clock pulses until K goes "hi".

6. When the Preset goes "lo" it will over-ride all other inputs and make Q "hi" .

7. When the Clear goes "lo" it will over-ride all inputs except the Preset and make Q "lo" .

tn = Input before clock pulse tn + 1 = Output after clock pulse

Fan-out = 10 each output

FIG. 1-6 SN7476 DUAL J-K MASTER-SLAVE FLIP-FLOP

The J-K Master-Slave Flip-Flop with AND gate entry type SN7472 (Figure 1-7) is a single circuit which behaves similarly to a circuit in the SN7476, except that the J and K inputs are operated through AND gates so that the three inputs to each AND gate must be "lo" for the function to operate.

TRUTH TABLE AS FIG. 1-5

. J = J1, J2, J3 K = K1, K2, K3

Fan-out = 10

FIG. 1-7. SN7472 J -K MASTER-SLAVE FLIP-FLOP

The Decade-Counter type SN7490 shown in Figure 1-8 contains four dual-rank master-slave flip-flops internally connected to provide separate divide-by-two and divide-by-five counters. Gated reset connections are provided to inhibit count inputs and return air outputs to Binary-Coded-Decimal (BCD) zero or nine. Three divider modes are possible:-

1. Completely separate and independent divide-by-two and divide-by-five counters (except for the reset function).

2. BCD output. Both counters in series with the divide-by-two counter at the input end. This mode is used to drive the decoder-driver type SN74141.

3. Divide-by-ten with symmetrical square wave output. Both counters in series with the divide-by-five counter at the input end.

The BCD-To-Decimal Decoder-driver type SN74141 shown in Figure 1-9 will directly drive a gas-filled cold-cathode indicator tube (Nixi) from a BCD input such as that provided by the SN7490 just described. Up to 70 volt protection is provided at the outputs going to the indicator tube, although the nominal 5 volt limit still applies to other connections. The indicator tube supply should exceed the tube starting voltage but not be greater than 70 volts above the tube running voltage. For tubes which ionize at 180 volts and run at 140 volts, a power supply in the order of 190 volts is satisfactory.

+++++++++++++++++++++++++

Fan-out = 10 each output Resets must be 'lo' for counter to operate n- = clock or counter input TRUTH TABLE BCD MODE n A B C D

BCD MODE

---------- FIG. 1-8. SN7490 DECADE COUNTER

Selected output sinks to near ground potential for directly driving gas-filled indicator tubes.

FIG. 1-9. SN74141 BCD TO DECIMAL DECODER - DRIVER

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