By J. A. "Sam" Wilson, CET.
Your comments or questions are welcome. Please give us permission to quote from your letters. Write to Sam at:
J.A. "Sam" Wilson c/o Electronic Servicing P.O. Box 12901 Overland Park, Kansas 66212
No " Royal Road"
Euclid was a teacher, among other things. Once he was asked to teach the rules of geometry to a member of the aristocracy which governed the country. The ruler was impatient, however, and didn't want to follow the slow-moving traditional methods of learning. He asked Euclid for a special approach that would make the subject easier and faster. Euclid replied, "There is no royal road to geometry." "How can I become a top-rated electronic technician?" Many readers ask this question in their letters.
The phrases vary, but the meaning always is the same: each man sincerely wants to be the very best kind of technician, and not merely an average one.
Unlike Euclid's royal student, the men writing to me don't seem to be searching for an easy way out. They just want to make sure the time spent in study will produce the best possible results.
Unfortunately, there is no single method that is best for everyone. Some people can learn a large amount from a correspondence school. Others don't like to read about the subjects, and they need a classroom personal approach. One man I knew in California reached a very high technical level by making effective use of the local public library and the many good books there.
Now, I want to make clear that I'm not qualified in any way to advise the best and most-effective way of studying. I'm not even qualified to make educated guesses.
However, as an experienced teacher, I have noticed some methods that appear to work well for most people. They are listed here.
Develop an interest---It is easier to study any subject that holds interest. Monday-morning-quarter backs are not required to memorize the scores and performance records of their favorite football teams or players. No, they learn all that information because they're interested in the subject and want to know it completely.
Likewise, my best students are those who have an active genuine interest in electronics.
Start a schedule-Study or read some technical topic each day or evening. Don't wait until forced to learn about a subject in order to survive, and then go on a crash program.
One good example is digital electronics, especially microprocessors. The time is coming soon when technicians won't be able to under stand television receivers, industrial controls, communications and many other products unless they have a working understanding of micro processors.
By coincidence, a new series about the internal workings of microprocessors will begin in Electronic Servicing this March or April. Make a monthly habit of spending sufficient time in studying these vital facts.
------ Figure 1 -- This ripple counter displays consecutive counts up to decimal
9, then it resets to zero and counts up again. Each flip flop toggles the
next, so they operate in sequence and therefore require time for all flip
flops to finish toggling. With some ICs, the time delay is sufficient to
cause a false NAND output (glitch) which resets the counter prematurely.
The capacitor prevents the false resetting when the counter is operating
with a slow clock speed. However, a capacitor can't be used for fast speeds.
One solution is to change to a synchronous type of counter.
Perform experiments---During 1978, my industrial electronics series gave details of experiments to be per formed with digital components.
Refer to those articles and work the experiments. Merely reading about a subject is so easy that most is forgotten rapidly. More information is retained by actually doing the work or the experiment.
Learn electronic history--Beginning technicians often have difficulty in obtaining an overall comprehension of electronics because they are starting in the middle of the subject. New circuits are easier to understand when compared to those developed in the past.
Encyclopedias and the biographies of electronic pioneers are helpful by showing the evolution of electronics. This is the approach that worked best for me.
If there is a method I haven't covered here, please write the details and send them to me in care of the magazine.
Delay problems in counters
Ripple counters of the type described previously in the industrial series have an inherent time delay during normal operation. A brief review of ripple counters should clarify the reasons why this time delay is produced and how it can cause trouble.
Ripple-counter operation-The counter shown in Figure 1 works by a series of four frequency dividers.
Two clock pulses to flip flop 1 (FF1) produce one pulse at the output. When delivered to the clock input of FF2, two output pulses from FF1 produce one output pulse from FF2. And so on until each flip flop has been triggered in sequence by the one before it.
A logic 1 (high) at the output of a flip flop lights its LED, so an unlighted LED indicates a logic 0.
Each LED is assigned a different decimal value. Starting at the left, those values are 8, 4, 2 and 1.
Therefore, a binary readout of 1100 is 8 + 4 + 0 + 0 = 12 decimal.
Maximum binary count from four flip flop dividers is 1111 or decimal 15. A counter without the programming NAND begins at 0000 readout and increases to 1111 before starting over again at 0000.
In Figure 1, the ripple counter is programmed by the NAND to display all counts from zero to 9.
Then at the beginning of the 10 count (binary 1010), all NAND inputs have highs, and the NAND delivers a low (logic 0) to all flip flop reset terminals. This resets all flip flops to zero for a 0000 binary count. From zero, the counter again counts up to 9 and resets at the beginning of the 10 count. The sequence repeats over and over.
Although the resetting occurs so rapidly that no blink of the 1010 display on the LEDs can be seen, it is not instantaneous. A larger time delay occurs in the arrival of the highs at the NAND inputs.
This brief explanation shows the reason for the terms "ripple" and "ripple through" that are applied to the counter. The triggering ripples from one flip flop to another, in a way very similar to the domino effect where one falling domino makes the next one fall, until all have been toppled. The flip flops are operated in sequence, and time is required.
Fast operation--At high clock frequencies, it is possible for a following clock pulse to arrive at the input of the first flip flop before the last flip flop has received its command signal. The result is a "race" condition, and the displayed count is completely false.
NAND programming--The problem of wrong counts and premature resets can occur with counters that are programmed with a 4-input NAND (as most were in the industrial articles).
In the Figure 1 counter, for ex ample, highs must be at all NAND inputs simultaneously (see Figure 2). Unfortunately, the time delay between output highs from the first and fourth flip flops can be sufficient to prevent the fourth flip flop high from arriving at the NAND before a high from a previous flip flop has begun to drop toward zero volts (low). This causes a narrow glitch which resets the counter too soon.
One solution for the delay problem is to use fewer NAND inputs and have them separated by no more than one flip flop.
In Figure 2, examine the column of binary states. The resetting binary condition is 1010; therefore, try to find two that do not occur in any count previous to 10. Of course, the NAND inputs can come from the NOT-Q outputs, if de sired. Six different pairs of NAND inputs are possible from the four binary digits.
After you choose a pair to be tested, begin at the 1010 binary count and move up the column to see if the same logic levels appear at any previous count. If so, that pair cannot be used. Two examples follow.
If the NAND inputs are taken from the Q output of FF4 and the inverted FF3 output at its NOT-Q, the NAND will be triggered at the 10 count all right. However, it also would be triggered by 9 and 8 as well.
----Figure 2 (A) The 4-input NAND column is for Figure 1, and it proves
the counter will reset at the beginning of decimal 10 count. (B) Outputs
from FF4 and FF2 were selected for the 2-input NAND of Figure 3. Use the
binary count column to verify this choice.
-------Figure 3 No glitches are produced by this simplified ripple counter.
Only one flip flop separates the signals that are applied to the two inputs
of the NAND. Therefore, the time delay is shortened. With only two inputs,
the programming must be selected with greater care.
Next, take the NAND inputs from the NOT-Q outputs of both FF3 and FF1. The NAND will be triggered at the 10 count. Unfortunately, it also will trigger at 8, 2 and zero.
Neither of these two examples will program the counter properly.
(The remaining three wrong combi- nations are omitted to avoid wasted time.) Now select two NAND inputs from the Q outputs of FF4 and FF2. Check the binary count column for a previous identical listing. There is none. Therefore, the counter will operate properly with those two NAND inputs.
Two-input NAND--Figure 3 shows the ripple counter after programming by a two-input NAND gate.
The first and third digits of the 1010 binary (decimal 10) count will force the output of the NAND to go low and reset the counter.
This circuit will operate exactly the same as the one of Figure 1 does, except glitches are eliminated.
The different programming from two flip flops that are separated by only one other flip flop has reduced greatly the time delay between the NAND inputs.
Also, the circuit simplification allows a reduction in the number of connecting wires, and this is important when printed-circuit boards are used.
Synchronous counters
Another method of eliminating glitches is to use a synchronous type of counter which forces all of the flip flops to change at the same time. A synchronous counter with two flip flops is diagrammed in Figure 4.
Two conditions are necessary before a TTL flip flop will toggle.
Both J and K terminals have logic 1 highs, and the clock signal switches from high to low. (CMOS types toggle when the clock signal switches from low to high.) In Figure 4, notice that the clock signal is connected to the clock terminals of both flip flops. The first one has permanent highs at the J and K terminals, so it is free to toggle continuously from the clock signal. However, the J and K terminals of FF2 are connected to the Q output of FF1. So FF2 can toggle only when FF1 is high.
Follow the operation for a few clock pulses. Assume that both flip flops are in the low condition at turn-on. At the first high-to-low transition of the clock signal (that is, the first trailing edge), the input FF1 flip flop will change to the high condition.
Although the FF2 flip flop also is supplied with the same clock pulses, it can't toggle on this first trailing edge because the J and K terminals have lows. A high doesn't reach them until after the first flip flop toggles, and the clock pulse by then is low. FF2 ignores the first clock pulse.
After the first trailing edge, FF1 has a high output which is applied to the J and K terminals of FF2.
This high remains until the next trailing edge which toggles FF1 to low output and toggles FF2 to high output (for the first time). FF2 now has lows at its J and K terminals, therefore it remains without change during the next trailing edge of the clock signal that toggles FF1 to the high condition again. The FF1 output high arms FF2 so it and FF1 both go low at the next trailing edge.
Although this explanation is correct, it is a bit tedious to follow.
Refer to the waveforms and the pulse-versus-state table in Figure 4 if problems arise.
Notice that the table shows a repetitive pattern through counts of decimal 0, 1, 2, 3 and back to zero for another identical count. This proves the circuit is performing a binary count.
Advantages and disadvantages
When a comparison is made between ripple (asynchronous) and synchronous counters, the ad vantages are not all on one side.
Synchronous counters are better because the flip flops all change at the same time, thus preventing any race problem or glitches.
However, synchronous counters require increased current from the power supply. Also, for counts above decimal 3 (logic 0011), additional gates must be used. These are not needed for ripple counters.
Circuits for higher-count synchronous counters will be presented next month.
-------- Figure 4 Glitches are prevented by the design of synchronous counters.
(A) The schematic shows one with two flip flops. All toggling occurs at the
trailing edge of the clock signal, and not from a previous flip flop. Therefore,
all flip flops (that otherwise are ready for toggling) will change state at
the same time. (B) Typical waveforms show that FF1 is toggled by the trailing
edge of pulse 1. But FF2 can't toggle then because the J and K terminals are
not high. Pulse 2 toggles both flip flops because the FF2 J and K terminals
now have a high from FF1. And so on through the following pulses. The trailing
edge of pulse 4 restores both flip flops the starting condition, and the counter
continues.
Also see: Sam Wilson's Technical Notebook: COUNTER GLITCHES