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Introducing an experimental error-correction power amplifier. The first of this two-part series (part 2, here) presents an output stage with error correction.
Most solid-state power amplifiers employ some form of global negative feedback to reduce nonlinearities and output impedance. In some cases, designers exploit alternatives such as feedforward to circumvent perceived disadvantages of global negative feed back. The present design uses error correction as (re) defined by Malcolm Hawksford in 1981. In part 1 of this article I introduce error correction for audio amplifiers and present an audio output stage based on error correction. Part 2 will extend the principle to the voltage amplifier stage and present a complete error correction power amplifier.
THE POSITIVE SIDE OF NEGATIVE FEEDBACK
Negative feedback (nfb) very often gets a bad rap from audio pundits. Comments such as “it cannot correct after the fact” or “it slows down the amp” pop up again and again. When pressed for arguments, these are either not forthcoming or fly in the face of well-established engineering principles.
Negative feedback, as a general principle, is one of the most powerful tools available to the designer to build amplifiers that are transparent to the signal they amplify. With that I mean that they do not add or subtract anything to the input signal. In reality, circuits are never ideal, but the changes to the signal can be made so small that inaudibility of the changes is pretty much guaranteed. Negative feedback is also fully understood, and although bad-sounding feedback amplifiers are still being sold, it is totally unnecessary. So, you may ask, why bother with error correction (EC)?
For one thing, it is a different road, and the trip is often more enjoyable than the destination. Second, although you will see that EC is in many respects another face of nfb, there are some interesting differences and different challenges, leading to better understanding of the processes inside any feedback amplifier.
WHAT THE H.EC?
Let me start by narrowing down what I mean by “EC” in the context of this article. I refer specifically to Malcolm Hawksford’s paper (I will use the term “H.ec” to refer to Hawksford’s topology, and “EC” to refer in general to error correction.) Figure 1 is the basic topology from that paper. You see an amplifier block N. to which error correction will be applied. The difference between the input and out put of that amplifier is either added to the input via block A (error feedback), or to the output via block B (error feedforward). All the summing and differencing blocks have a gain of 1.
Of course, it is important that the error correction signal is added in just the right proportion to cancel the original error. In this design, I use the correction via block A, added to the input. I will further assume that the amplifier block N is an output stage from an audio power amplifier with a gain of almost, but not quite, 1. The object here is to make this gain, as seen from Vin, exactly 1, independent of output load, frequency and signal level. If I succeed, I will have an ideal output stage.
Of course, I won’t get that far, but as you will see, I can get pretty close.
Figure 2 shows the conceptual circuit. The gain of the output stage you want to linearize is “about 1.” In practice, most output stage gains are any where between 0.92 and 0.98, depending on the topology, loading, signal frequency, and so on. You see immediately that Vc, the signal that is fed back to the input, is Vout-Ve, where Ve is the effective input signal to the output stage. You can now calculate Ve as Ve = Vin - (Vout-Ve). You also know that Ve = Vout/A, and if you plug that into the former equation, and rearrange terms, you get: Vout = Vin.
PHOTO 1: Prototype amplifier module and output! protection board.
What is significant here is that the actual amp gain A is no longer part of the equation. Whatever the shortcomings, nonlinearities or errors of A, I got rid of all of those. This is the ideal output stage!
If you are familiar with practical audio amplifiers, you probably are feeling a bit uneasy now. An ideal power stage? That would be the first one ever! And you are right--in reality, you can’t reach that ideal. One reason is that you assumed that the summers S1 and S2 in Fig. 2 are ideal summers, without flaws. That cannot be. Those summers consist of passive and (most probably) active devices that have their own nonlinearities, so the basic accuracy will not be ideal. Their characteristics will also vary with frequency, so the correction accuracy will vary with frequency.
Because the output stage gain will also vary with frequency and load, the amount of correction required will vary with frequency and load, meaning that signal levels in the summers vary with frequency and load as well. This further leads to accuracy limitations. Nevertheless, it is possible to greatly improve the performance of the out put stage with relative simple means, as you will see.
FIGURE 1: Hawksford’s general feedback/feedforward/error correction structure.
FIGURE 2: Error correction concept.
THERMAL MEMORIES
There was one other goal I had in mind for this amp. In most power amps, the thermal bias compensation is obtained by mounting a transistor in the bias circuit on the same heatsink as the output devices. In that way, if the output devices heat up and start to draw more current, the bias transistor also heats up. That causes the bias voltage to decrease, and the object is to dimension this thermal feed back loop such that the bias current in the output devices remains stable with temperature. But because it takes time for the heatsink to heat and cool and transfer this changing temperature to the bias transistor, this loop reacts relatively slowly, in terms of several seconds or more.
The first time I read about this was in an article by French designer (audio, not clothes) Hephaistos He realized that the dissipation levels in the out put and driver devices vary with signal output levels, related to music level variations, and that they are much faster than the reaction time of the thermal bias compensation circuit. When a high level signal burst appears, the de vices’ operating point would shift, and would return to the earlier state only seconds after the high level burst had disappeared. Such a burst is too short for the thermal feedback to adjust the bias. A smaller signal after the burst would thus be amplified with different operating conditions than before. He called this thermal or memory distortion.
In my design I wanted to get rid of this problem as well. Therefore, I selected Sanken STDO3N and STD03P devices for the output stage. These are Darlingtons, with a bias diode integrated on the transistor chip. By using this diode in the bias circuit, it can track thermal cycles in the output devices almost instantaneously, thus hopefully eliminating thermal distortion. Because it is a Darlington, any (pre) driver dissipation would also be low enough to avoid memory distortion.
There’s one catch: the on-chip sense diodes need to be run with a specific current to make their thermal bias changes (in millivolts per degree) equal to the Vbe changes of the driver and output devices in millivolts per degree. This requires a different bias circuit from the usual Vbe multiplier.
ERROR CORRECTION BASICS
Figure 3 shows the basic topology of the output stage without error correction. You will notice the integrated bias diodes in the output devices. To get a precise tempco (temperature co efficient) matching between these di odes and the output Darlington’s b-e junctions, Sanken’s engineers used a string of five Schottky diodes in the P-device and a single silicon diode in the N-device. The datasheet specifies a bias current of 2.5mA through the diodes, and this current is set by the current mirror formed by Q19, Q20 and Q18, Q11. The current is set with R44 and mirrored into the diodes.
To keep this current stable the supply voltage for the current mirrors is regulated by zener diodes D10, D11 to 15v. The bias for the zeners is coming from the main supply via R36-R37 and R35-R38. To keep that supply stable, the junction between those resistors is bootstrapped from the output via C11-C12. The result is that with varying output signal levels, the zeners can always provide a constant supply voltage for the current mirrors.
The datasheet for the output devices also specifies a quiescent current of 40mA through the output Darlingtons for best thermal tracking. Although the diodes track the changes in the Darlington Vbe quite well, the absolute value of the diode threshold values varies from unit to unit. Thus, a way to adjust it is required, and that is the purpose of RV1, which you should set for 40mA through the output stage.
OK, so now you have a nice and stable output stage, but you need to drive it with a signal. That is done through R60 to the junction of R19-R20.
Suppose that the input signal goes positive: the junction of R19-R20 goes positive so there will be less cur rent through R19. Because the current coming out of the collector of Q20 is fixed, there will be more cur rent into the base of the Darlington and the output signal will also go positive, following the input signal. In this case there will also be more current through R20 so less from the base of the P-device. This will work quite well for DC and low frequencies and nominal, resistive (8f) loads, where the Darlingtons have a very high gain and the current mirrors are almost perfect.
However, with increasing frequency and increasing load currents, the Darlingtons need more input current, so capacitors C7 and C8 are added to by pass R19-R20 so the input source can directly drive the output devices. And in case you wonder why R19 and R20 are there in the first place, you need them to set the DC level at the output to zero, to avoid DC offset going to your speakers.
This output stage is quite simple, reasonably linear, and satisfies the requirement for accurate temperature tracking of the instantaneous output device dissipation. The next step is to wrap error correction around it. (Be cause the stage has no excess gain, you cannot use a global nfb loop around it. The nfb loop that normally includes the output stage of a feedback amp, of course, relies on the excess gain in the voltage amplifying stage to work its distortion-reduction trick.)
THE CURRENT CONVEYOR
For EC you need to derive the difference between the input and output signal, and add that difference to the input signal (Fig. 2). Subtracting or adding two signals that are of similar level is trivial with op amp circuits. You can use one op amp (S2) to subtract Vout from Vin, and another (S1) to add the resulting Vc to Vin. But in the spirit of EC, I didn’t want to use an obvious high global feedback element in this circuit.
FIGURE 3: Basic Error-Correction Amplifier output stage.
FIGURE 4: Current conveyor basics.
After a lot of head scratching and many Internet searches, I came up with the idea to use a current conveyor. The basic circuit is shown in Fig. 4A.
This is a very interesting circuit. Basically, whatever you send into the Y terminal comes out in the opposite direction from the Z terminal, which works as a current source. Hence the name current convey or: the current at the input is conveyed to the output. This particular type is called a 2 generation convey or, generally shown as a “CCII.” Terminal X is a reference terminal for the current input, and the voltage at Y will be kept the same as that at X. What is this good for?
As an example (Fig. 4B), if you connect a signal to Y via a resistor, you know that the voltage across that resistor will be the signal minus Vx (remember, Vy = Vx). So the current into Y is this voltage across the resistor divided by the resistance. That same current comes out of Z, so you have now converted a signal level to a current that can be converted back to a signal via another resistor. If the second resistor on Z is twice the input resistor on Y, you have a gain of two. You can set the gain of this circuit with just one resistor ratio (Fig. 4B).
The nice thing here is that you can accurately set a gain (or attenuation, if that would be required) without needing to resort to nfb. The current conveyer does not use global feedback; it is an open loop circuit. (Current conveyors consist internally mainly of current mirrors; and it can be argued that current mirrors use 100% local feedback. But I won’t get into that discussion here!)
There is our summer: I will use equal resistors for a gain of one. The error correction loop around my output stage is shown in Fig. 5. The error between the input and output appears across R34 and develops a cur- rent that is “conveyed” to R25. This adds the correction signal to Yin to make the H.ec work as in Fig. 2. The positive feedback loop in Fig. 2 from Ve through Vc back to Ve is realized with the connection of Z to X in Fig. 5.
So, at this point, you need to become practical: where do you find this CCII thing? There are CCIIs around, often designed in low-voltage CMOS IC technology, and mostly used in laboratories in university settings. They might as well be made from unobtanium. But, interestingly, CCIIs are part and parcel of current feedback op amps and so- called “diamond transistors.”
Figure 6 shows the simplified diagram of the internals of an AD844 current feedback op amp. Recognize the CCII terminals: pin 3 is the high-impedance X terminal, pin 2 the low impedance current input Y, and pin 5 labeled Tz is the current source output Z. There is an open loop buffer stage between Tz and the output at pin 6. You can readily see that whatever current is injected into pin 2 (Y) comes out at pin 5 (Z), but in the opposite direction.
It seems this part has been custom designed for this! (Other similar parts are Maxim’s MAX435 and MAX436 (now obsolete) and TI’s 0PA860, which superseded the OPA660 and OPA2660.) You can use the input stage for the CCII function, and the buffer to drive the output stage to isolate the input summer from the output stage’s nonlinear input impedance. You see that the current output terminal is already internally connected to the buffer input—again, just what you need!
Figure 7 shows the full output stage circuit, with component values. Note that the amplifier input is at pin 5 of the AD844, not at pin 2 or pin 3 as you would expect in a classical op amp circuit. This is not an op amp circuit, but I’m sure many people will be con fused by this.
FIGURE 5: Output stage with error correction.
PUTTING IT ALL TOGETHER
This output stage has two pairs of output devices. The design goal was 100W in 8ohm and 200W in 4ohm. For a pure resistive load, one pair of devices would have been sufficient. However, speakers are not purely resistive; de pending on the signal frequency they can act capacitively or inductively, especially if there is a complex cross over filter. This leads to phase shifts between the output voltage and output current, so you can encounter the situation where the output voltage is negative, but with the current coming from the positive side (the N-device).
The N-device will then have a quite large Vce, and the current it is allowed to source is much smaller with a large Vce than what you would think from the allowable dissipation.
You need at least two output pairs, and there is an additional current source to bias the thermal tracking diodes, as well as an extra bias adjust trimmer for the second pair.
FIGURE 6.
FIGURE 7: Full gain-of-one output stage with Hawksford error correction.
There are a few extra components in the circuit that I haven’t mentioned yet. R60 is a small resistor in series with the AD844 buffer out put stage. A large part of the output drive goes via the two capacitors C2 and C4 to bypass the current mirrors. R60 isolates the buffer output from capacitive loads ensuring stability. Another capacitor—C3—is placed across R25.
As the frequency increases, the loop through the output stage as well as the current conveyor will exhibit phase shift. In a “classical” feedback amplifier, if the phase shift becomes too large, it will turn the nib into pfb, which, as you all know, may lead to instability and even oscillations. In H.ec this can also happen, so you need to roll off the loop gain for higher frequencies. C3 does just that by decreasing the effective correction impedance (R25// C3) with increasing frequency. Also, remember that this stage needs to be driven from a low impedance source, because the source output impedance forms part of the EC scaling resistor R25.
FIGURE 8: Output stage THD versus frequency with and without H.ec. Vo = 10V
RMS at 1kHz.
Finally, there is the 6 connector J10 and some associated resistors.
This is the connection to the protection board. It provides the Vce and Ic related information of the output devices to the protection circuitry. This output stage is pretty linear as attested to by the curves in Fig. 8. Note that this is without classical negative feedback around it, and it can perfectly stand on its own when driven by a suitable voltage amplifier (Vas) stage.
So, let me take a break here; I’ll address that Vas, and the power supply, in the next installment and develop a fill- fledged, high-quality audio power amp.
REFERENCES:
1. Hawksford, M.J., “Distortion correction in audio power amplifiers,” JAES, Vol. 29, No. 1/2. pp. 27-30, Jan/Feb 1981.
2. “Thermal Distortion—it exists, I’ve seen it”—Hephaistos, L’Audiophile, or 32, May 1984.
3. In the early 90s, an IC designer, Doug Wadsworth, designed a current conveyor for audio on his own money (PA630). The chip, the “Swift Current” chip, eventually found its way into Wadia DACs. It is no longer available for other parties, but I had bought some from him and knew they were a well-kept secret for hi-end audio.
How H.ec Differs from Global Negative Feedback--or Not.
Error correction works by feeding back (part of) the output signal to the input of the amplifier. It has many similarities to a classical negative feedback loop. But how is it different?
TWO SIDES OF THE SAME MEDAL
Figure A is the basic H.ec topology. You can identify two feedback loops: one positive feed back loop via Ve to \Tc and back to Ve; and a negative feedback loop from the amplifier output to Vc. That particular arrangement makes H.ec so interesting. Assume that the output stage A is ideal and has a perfect gain of 1. In that case, the correction signal at Vc is 0, because there is no difference between Ve and Vout.
You could just throw away the whole error correction part. But if the gain A is just a bit less than 1, Vc is a negative signal which is subtracted from Vin, and the effect is that Ve increases. This works as a positive feedback loop. In the case where the gain A is larger than 1, the signal at Vc is a positive signal, which will be subtracted from Vin to decrease Ve. In this case, the system works as a negative feedback loop.
So, what you see is a combined feedback loop that can act either as a positive or negative feedback loop, or not at all, depending on the error of the main amplifier block. It looks as though the phase and level of the loop adjusts itself as needed.
The validity of treating a combined feed back loop by “summing” the individual loop contributions has been established by several researchers in the past. Gerald Graeme, at the time analog IC development manager of Burr-Brown, has written several articles about it. If you combine the two feedback loops in a single loop, as is often done to make analysis easier, you get Fig. B. Again, you can see from the formulas that if the output stage gain K = 1, there is no feedback at all. For comparison, Fig. C shows the global nib topology for a unity-gain amplifier.
STABILITY ISSUES
Mention positive feedback (pfb), and most designers will immediately worry about stability. Indeed, positive feedback is what makes an oscillator sing. But pfb is not enough to make a circuit oscillate or unstable. There must also be a loop gain that is greater than 1 to sustain the pfb loop.
In Fig. A, it looks as though the phase and pfb loop gain is 1: from Ve through B and the unity gain summer Si, and I defined B as a unity gain summer as well. So, the knee-jerk reaction is: if B rises only a bit above 1, the whole thing oscillates! But, counterintuitive as it may be, this is not the case at all, because it only looks at one part of the total feedback loop. You must look at what part of the output signal is fed back, and that part is B*(1-1/K). If B = 1 and K is, say, 0.95 for an EF output stage, the pfb gain is only 1/20! So, B can even be 2 or S or 10 and it would still not oscillate! Isn’t that interesting?
If you calculate the closed loop gain Gd of Fig. B, you get:
Now you all know that in a real amplifier both K and B will be frequency dependent and show low-pass behavior. So, look into that as well. Assume, as a first approximation, that both K and B have two poles, at o radians and (02=5.10 radians. In this formula for G you then need to replace B and K with the following expressions:
Now you call MathCAD to the rescue and ask it to plot the frequency response of the closed loop gain with these substitutions (Fig. D).
There is a trifle of peaking, a dB or so, but otherwise it looks very well behaved. Of course, there is much more to this, which is beyond the scope of this article, but at least you should have gotten a flavor for this very interesting topology.
FIGURE A: Basic error correction topology.
FIGURE B: Two feedback loops are combined. The two figures are equivalent.
FIGURE C: Classical global nfb amplifier for a gain- of-one amplifier.
FIGURE D: Closed loop gain frequency response.
A. “Generalized op amp model simplifies analysis of complex feedback schemes”—Gerald G. Graeme, EDN, 15 April 1993, pp. 175.